iSim:PEオフラインシミュレーションツール

AI生成コンテンツ: The ISL70005SEH and ISL73005SEH combine a synchronous buck regulator and a low noise LDO regulator to deliver dual outputs with high efficiency and radiation hardness. They support 3.3V or 5V power buses, providing up to 3A continuous load current for the buck and ±1A for the LDO, suitable for powering FPGA and DDR memory. The iSim:PE model enables designers to simulate start-up, steady-state, transient responses, AC performance, and loop stability at 25°C, closely matching silicon behavior. The document includes detailed schematics for FPGA and DDR tracking applications, simulation setups for load transient and Bode analysis, and comparisons between simulation and silicon performance. It also covers licensing terms and model revision information.

AI生成コンテンツ: The document explains modeling and simulation techniques for VR11.1 voltage regulator design using iSim:PE. It covers capacitor modeling with C, ESR, and ESL parameters, load current waveform generation, and PCB parasitic resistance and inductance. The error amplifier and feedback compensation are modeled with specific voltage limits. The dual edge modulator uses Active Pulse Positioning for improved transient response. Current sense feedback maintains phase balance, droop control, and loop stability by sensing inductor current and applying gains based on phase count and resistor values. The complete circuit integrates all these blocks for accurate simulation.