Low pin and internal configurable analog MCU


The RL78/G11 microcontroller line-up concept is based on small packages like 10 to 25pin, in small 16KB flash memory and rich analog peripherals such as A/D converters, D/A converters, comparators and PGA and these are configurable as PGA+ADC+VBGR, PGA+CMP, CMP+DAC/VBGR, or PGA+CMP+DAC/VBGR. Using the smart  features like DTC and ELC a lot of peripherals can be connected internally to reduce CPU workload and can save overall power consumption.  It also supports very low power operation (100 uA @ 1 MHz ) and a high speed 4µs wake up. Available in small 3x3mm² WFLGA , 4x4mm² HWQFN and standard 20pin LSSOP, this MCU line is suitable for sensor application, Lighting/power sources and many small appliances.


Key Features:

Item RL78/G11
Pin Count 10-pin 16-pin 20-pin 24-pin
Part Name R5F1051A R5F1054A R5F1056A R5F1057A
Prgram Flash (KB) 16 KB
Data flash memory (KB) 2 KB
Main System Clock External oscillator 1 to 20 MHz: VDD = 2.7 to 5.5 V, 1 to 16 MHz: VDD = 2.4 to 5.5 V,
1 to 8 MHz: VDD = 1.8 to 5.5 V, 1 to 4 MHz: VDD = 1.6 to 5.5 V
X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK)
High-speed on-chip oscillator clock (fIH) Max: 24 MHz HS (High-speed main) mode: 1 to 24 MHz (VDD = 2.7 to 5.5 V),   
HS (High-speed main) mode: 1 to 16 MHz (VDD = 2.4 to 5.5 V),   
LS (Low-speed main) mode: 1 to 8 MHz (VDD = 1.8 to 5.5 V),   
LV (Low-voltage main) mode: 1 to 4 MHz (VDD = 1.6 to 5.5 V),   
LP (Low-power main) mode: 1 MHz (VDD = 1.8 to 5.5 V)
Middle-speed on-chip oscillator clock (fIM) Max: 4 MHz
I/O Port Total 7 13 17 21
CMOS I/O 4 9 13 17
CMOS Input 3 4
Timers 16-bit timer (TAU) 2 channels
(1 x PWM)
4 channels
(3 x PWM)
4 channels
(4 x PWM)
Watchdog timer 1 channel
16bit - Timer KB 1 channel (counter, compare & dithering count, PWM output with dithering function and smooth start, interleave PFC output mode, drive 1 half bridge
12-bit interval timer 1 channel (low power timer, usable also in STOP, HALT mode)
8/16-bit interval timer 2 channels (8 bit)/1 channels (16 bit)  (cascadable low power timer, usable also in STOP, HALT mode to create long sleep intervals
Timer output 3 5 6
Clock output/buzzer output 1 2
2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz   
(Main system clock: fMAIN = 20 MHz operation)
10-bit resolution
A/D converter
External 3 channels 8 channels 10 channels 11 channels
Internal 1 channel
8-bit D/A converter 1 channels 2 channels
Comparator (Window Comparator) 1 channels 2 channels
PGA 1 channel
Data Operation Circuit (DOC) Comparison, addition, and subtraction of 16-bit data
Serial interface [10-pin products] CSI: 1 channel/UART: 1 channel
[16-pin products] I²C: 1 channel, CSI: 2 channel/UART: 2 channel/simplified I²C: 1 channel
[20-pin products] I²C: 2 channel, CSI: 3 channel/UART: 2 channel/simplified I²C: 3 channel
[24-pin, 25-pin products] I²C: 2 channel, CSI: 4 channels/UART: 2 channel/simplified I²C: 4 channels
Data transfer controller (DTC) 13 sources 22 sources 23 sources 24 sources
Event Link Controller (ELC) Event input: 11 Event input: 16 Event input: 17 Event input: 18
Event trigger output: 3 Event trigger output: 4 Event trigger output: 4 Event trigger output: 4
Vectored interrupt Internal 20 24 25
sources External 3 9 10 13
Key interrupt - 3 5 8
Power-on-reset circuit • Power-on-reset: 1.51 ± 0.04V (TA = -40 to +85°C) / 1.51 ± 0.06V (TA = +85 to +105°C) 
• Power-down-reset: 1.50 ± 0.04 V (TA = -40 to +85°C) / 1.50 ± 0.06V (TA = +85 to +105°C)
Voltage detector Power on 1.67 V to 4.06 V (14 stages)
Power down 1.63 V to 3.98 V (14 stages)
On-chip debug function Provided (Disable to tracing)
Other features Internal voltage reference (VBGR),  Interrupt flag output (INTFO)
Power supply voltage VDD = 1.6 to 5.5 V
Operating ambient temperature TA = -40 to +85°C (Consumer applications)
TA = -40 to +105°C (Industrial applications)
Package 10-pin LSSOP
0.65mm pitch
16-pin SSOP
4.4 x 5.0mm²,
0.65mm pitch
20-pin LSSOP
4.4 x 6.5mm²,
0.65mm pitch
24-pin HWQFN
4 x 4mm²,
0.50mm pitch

25-pin WFLGA
3 x 3mm²,
0.50mm pitch

Pin Count / Memory Size Lineup:

Program Flash



Block Diagram:

You can find an explanation of orderable part numbers here.


Resources for Software and Hardware

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Hardware Design Support

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Characteristics data Information on observed values. Please use this as reference data when developing your set.
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