Features
- Stable with ceramic capacitors
- 2A and 3A output current ratings
- 2.2V to 6V input voltage range
- ±1.8% VOUT accuracy guaranteed over line, load, and TJ = -40°C to +125°C
- Very low 120mV dropout voltage at 3A (ISL80103)
- Very fast transient response
- Excellent 62dB PSRR
- 49µVRMS output noise
- Power-good output
- Adjustable inrush current limiting
- Short-circuit and over-temperature protection
- Available in a 10 Ld DFN
Description
The ISL80102 and ISL80103 are low voltage, high-current, single output LDOs specified for 2A and 3A output current, respectively. These LDOs operate from the input voltages of 2. 2V to 6V and are capable of providing the output voltages of 0. 8V to 5. 5V on the adjustable VOUT versions. Other custom voltage options are available upon request. An external capacitor on the soft-start pin provides adjustment for applications that demand inrush current less than the current limit. The ENABLE feature allows the part to be placed into a low quiescent current shutdown mode. A submicron BiCMOS process is used for this product family to deliver best-in-class analog performance and overall value. These CMOS (LDOs) consume significantly lower quiescent current as a function of load over bipolar LDOs, so they are more efficient and allow packages with smaller footprints. The quiescent current has been modestly compromised to enable a leading class fast load transient response, and hence a lower total AC regulation band for an LDO in this category.
Parameters
| Attributes | Value |
|---|---|
| Input Voltage (Min) (V) | 2.2 |
| Input Voltage (Max) (V) | 6 |
| Output Voltage (Min) (V) | 0.8 |
| Output Voltage (Max) (V) | 5 |
| Output Current 1 (Max) (A) | 2 |
| Drop Out Voltage (Typical) | 81 (@2A,Vout=2.5V) |
| Fixed Output Voltage Option | Yes |
| PSRR (db) | 62 |
| Noise (100Hz to 100kHz) (μVrms) | 49 |
| Qualification Level | Standard |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| DFN | 3.0 x 3.0 x 0.90 | 10 | 0.5 |
Application Block Diagrams
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Additional Applications
- Servers
- Telecommunications and networking
- Medical equipment
- Instrumentation systems
- Routers and switchers
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| Part Number | Status | Samples | Longevity | Stock | RoHS | Package | Budgetary Price (USD) | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) | Country of Assembly | Country of Wafer Fabrication |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ISL80102IRAJZ | Active | Available | 2033 Dec | In Stock | RoHS:EN | DFN | 1ku | $0.98 | 10# | Tube | 3 | Yes | Pb-Free 100% Matte Tin Plate w/Anneal-e3 | -40 to +125°C | MALAYSIA | TAIWAN |
| ISL80102IRAJZ-T | Active | Available | 2033 Dec | Out of Stock | RoHS:EN | DFN | 1ku | $0.98 | 10# | Reel | 3 | Yes | Pb-Free 100% Matte Tin Plate w/Anneal-e3 | -40 to +125°C | MALAYSIA | TAIWAN |
| ISL80102IRAJZ-TK | Active | Available | 2033 Dec | In Stock | RoHS:EN | DFN | 1ku | $0.98 | 10# | Reel | 3 | Yes | Pb-Free 100% Matte Tin Plate w/Anneal-e3 | -40 to +125°C | MALAYSIA | TAIWAN |
| ISL80102IRAJZ-T7A | Obsolete | N/A | 2033 Dec | In Stock | RoHS:EN | DFN | 10# | Reel | 3 | Yes | Pb-Free 100% Matte Tin Plate w/Anneal-e3 | -40 to +125°C |
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- Product AdvisoryPDF 232 KB Mar 06, 2026
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- Application NotePDF 397 KB an1684 Jan 19, 2004AI-generated Summary: The document outlines important legal disclaimers and usage guidelines for semiconductor products. It emphasizes user responsibility for product design and safety, disclaims liability for damages, and clarifies no intellectual property licenses are granted. Products are categorized by quality grades with specific application recommendations. Users must comply with laws, avoid unauthorized modifications, and ensure safe use within specified conditions. Contact details for Renesas Electronics sales offices worldwide are provided.
- Application NotePDF 509 KB an1681 Jan 19, 2004AI-generated Summary: The document explains grounding techniques for PCB layouts using a dual op amp example on a single-layer copper board. It compares three grounding schemes: a center spine ground trace, an outer ground plane, and a split/star ground plane, highlighting the benefits of single-point grounding to minimize noise and antenna effects. It emphasizes following current paths, minimizing loop lengths, and ensuring close forward and return paths to reduce interference. The document also includes disclaimers on product use, quality grades, safety, and legal compliance.
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- Application NotePDF 397 KB an1684 Jan 19, 2004AI-generated Summary: The document outlines important legal disclaimers and usage guidelines for semiconductor products. It emphasizes user responsibility for product design and safety, disclaims liability for damages, and clarifies no intellectual property licenses are granted. Products are categorized by quality grades with specific application recommendations. Users must comply with laws, avoid unauthorized modifications, and ensure safe use within specified conditions. Contact details for Renesas Electronics sales offices worldwide are provided.
- Application NotePDF 509 KB an1681 Jan 19, 2004AI-generated Summary: The document explains grounding techniques for PCB layouts using a dual op amp example on a single-layer copper board. It compares three grounding schemes: a center spine ground trace, an outer ground plane, and a split/star ground plane, highlighting the benefits of single-point grounding to minimize noise and antenna effects. It emphasizes following current paths, minimizing loop lengths, and ensuring close forward and return paths to reduce interference. The document also includes disclaimers on product use, quality grades, safety, and legal compliance.
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- Product AdvisoryPDF 232 KB Mar 06, 2026
- Product Change NoticePDF 326 KB May 21, 2021
- Product Change NoticePDF 164 KB PCN12032 Jun 19, 2012
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