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Features

  • CPU: Arm® Cortex®-R52, maximum operating frequency 800MHz
  • EtherCAT® slave controller
  • Trigonometric function accelerator
  • Memory: Tightly coupled memory 576KB (with ECC), Internal RAM 1MB (with ECC)
  • Industrial Ethernet: EtherCAT® support
  • Encoder interface: 2ch (supports A-format™, EnDat2.2, BiSS®-C, HIPERFACE® DSL, FA-CODER)
  • Offering functional safety software up to SIL3
  • Motor current loop < 1µs
  • xSPI (Octa/Quad) support
  • Serial Host I/F
  • PWM: 3-phase complementary PWM output for dual motor control ​
  • ADC: 12-bit x 2 units
  • ΔΣ I/F: 6ch
  • Secure boot
  • Secure update
  • Hardware cryptographic IP
  • True Random Number Generator (TRNG)
  • Secure debug
  • Package: 196-pin BGA
  • Voltage: Core 1.1V , I/O 3.3/1.8V

Description

RZ/T2L is high-performance MPU that realizes high-speed and high-precision real-time control with EtherCAT. RZ/T2L has Arm® Cortex®-R52 @Max Frequency 800MHz and the large tightly coupled memory size (576 KB) is directly connected to the CPU, reducing the fluctuation in execution time that can occur when cache memory is used, and delivering deterministic and fast-response processing. RZ/T2L has seamless hardware architecture with RZ/T2M such as CPU core, peripheral functions and LLPP (Low Latency Peripheral Port) bus, and can be proposed for higher performance control systems such as AC servo. Also, RZ/T2L offers a scalable and compatible software platform with Renesas MPUs and MCUs. It enables customer utilizing their software assets for new model development.

Parameters

AttributesValue
CPU ArchitectureArm
Main CPUCortex-R52
Program Memory (KB)0
RAM (KB)1024
Carrier TypeBulk (Tray), Full Carton (Tray)
Supply Voltage (V)3.135 - 3.465
I/O Ports111
NPUNo
DRAM I/FSDRAM
3D GPUNo
Temp. Range (°C)Tj = -40 to +125
Operating Freq (Max) (MHz)800
Ethernet speed10M/100M/1G
Ethernet (ch)1
EtherCat (ch) (#)0, 1
USB FS (host ch/device ch)( 1 / 1 )
USB HS (host ch/device ch)( 1 / 1 )
USB SS (host ch/device ch)( 0 / 0 )
PCI Express (generation and ch)No
SCI or UART (ch)6
SPI (ch)4
I2C (#)3
CAN (ch)0, 2
CAN-FD (ch)0, 2
WirelessNo
SDHI (ch)0
High Resolution Output TimerNo
PWM Output (pin#)25
32-Bit Timer (ch)20
16-Bit Timer (ch) (#)14
8-Bit Timer (ch)0
Standby operable timerNo
Asynchronous General Purpose Timer / Interval Timer (ch)0
16-Bit A/D Converter (ch)0
14-Bit A/D Converter (ch)0
12-Bit A/D Converter (ch)8
10-Bit A/D Converter (ch)0
24-Bit Sigma-Delta A/D Converter (ch)0
16-Bit D/A Converter (ch)0
12-Bit D/A Converter (ch)0
10-Bit D/A Converter (ch) (#)0
8-Bit D/A Converter (ch)0
Capacitive Touch Sensing Unit (ch)0
Graphics LCD ControllerNo
MIPI Interfaces (DSI) (ch)0
MIPI Interfaces (CSI) (ch)0
Image CodecNo
Segment LCD ControllerNo
Security & EncryptionAES, RSA, ECC, Hash, TRNG, Secure boot, Unique ID, Unique ID

Package Options

Pkg. TypePkg. Dimensions (mm)Lead Count (#)Pitch (mm)
LFBGA12 x 12 x 1.41960.8

Application Block Diagrams

The manipulation and motion subsystem block diagram features AI-powered vision and real-time motion control.
Manipulation and Motion Subsystem
Manipulation and motion subsystem with AI-powered vision and real-time motion control.
AC Servo block diagram integrates motor control with EtherCAT design and utilizes a high-performance MPU.
AC Servo
This AC servo system offers cost-effective and high-speed motor control with EtherCAT design.
Industrial motor control system block diagram features an MPU and MCU for mutual monitoring, power supply ICs, and delta-sigma modulators.
Motor Control System with Industrial Network and Functional Safety
This motor control system integrates MPU and MCU for efficient industrial motor control and networking.

Additional Applications

  • AC servo
  • Industrial motor
  • Inverter
  • Industrial robot
  • Medical equipment
  • Wind turbine
  • Elevator

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Part NumberStatusSamplesLongevityStockPackageBudgetary Price (USD)Carrier TypeFamily NameSeries NameGroup NameCPU ArchitectureMain CPUSub CPUFloating Point UnitBit LengthProgram Memory (KB)Data Flash (KB)RAM (KB)ECC SRAMLead Count (#)Pitch (mm)Pkg. Dimensions (mm)Number of Supply Voltage(s) (#)Supply Voltage (V)I/O PortsDMAC or DTCDMA (ch)Temperature Sensor (ch) (#)Power-On ResetWatchdog Timer (ch)External Memory Bus (bit)DRAM I/FNPU3D GPUAcceleratorMOQTemp. Range (°C)External Interrupt Pins (#)LVD or PVDOperating Freq (Max) (MHz)Sub-clock (32.768 kHz)On-chip OscillatorEthernet speedEthernet (ch)EtherCat (ch) (#)USB Ports (#)USB FS (host ch/device ch)USB HS (host ch/device ch)USB SS (host ch/device ch)PCI Express (generation and ch)SCI or UART (ch)SPI (ch)QSPI (ch)OSPI (ch)I2C (#)I3C (ch)CAN (ch)CAN-FD (ch)WirelessIrDALIN (#)SDHI (ch)High Resolution Output TimerPWM Output (pin#)32-Bit Timer (ch)16-Bit Timer (ch) (#)8-Bit Timer (ch)Standby operable timerAsynchronous General Purpose Timer / Interval Timer (ch)RTC16-Bit A/D Converter (ch)14-Bit A/D Converter (ch)12-Bit A/D Converter (ch)10-Bit A/D Converter (ch)24-Bit Sigma-Delta A/D Converter (ch)16-Bit D/A Converter (ch)12-Bit D/A Converter (ch)10-Bit D/A Converter (ch) (#)8-Bit D/A Converter (ch)Analog Comparator (ch)OPAMP (ch) (#)PGA (ch)Capacitive Touch Sensing Unit (ch)Graphics LCD ControllerMIPI Interfaces (DSI) (ch)MIPI Interfaces (CSI) (ch)Camera I/F (Parallel)Image Codec2D Drawing EngineSegment LCD ControllerSSI (ch)Security & EncryptionDebug InterfaceRemarksMoisture Sensitivity Level (MSL)Country of AssemblyCountry of Wafer Fabrication
R9A07G074M01GBG#AC0ActiveAvailable2039 SepOut of StockLFBGA1ku | $10.72Bulk (Tray)RZRZ/TT2LArmCortex-R52NoDouble/Single32001024KBYes196#0.8mm12 x 12 x 1.43#3.135 - 3.465111DMAC321#No18,16SDRAMNoNoNo1Tj = -40 to +12516#No800MHzYesYes10M/100M/1G1ch01#( 1 / 1 )( 1 / 1 )( 0 / 0 )No64223#020NoNo00No252014#0No0Yes0080000000000No00NoNoNoNo0Unique IDJTAG/SWDAbsolute Encoder IF3TAIWANKOREA
R9A07G074M01GBG#BC0ActiveN/A2038 SepOut of StockLFBGA1ku | $10.72Full Carton (Tray)RZRZ/TT2LArmCortex-R52NoDouble/Single32001024KBYes196#0.8mm12 x 12 x 1.43#3.135 - 3.465111DMAC321#No18,16SDRAMNoNoNo1512Tj = -40 to +12516#No800MHzYesYes10M/100M/1G1ch01#( 1 / 1 )( 1 / 1 )( 0 / 0 )No64223#020NoNo00No252014#0No0Yes0080000000000No00NoNoNoNo0Unique IDJTAG/SWDAbsolute Encoder IF3TAIWANKOREA
R9A07G074M04GBG#AC0ActiveAvailable2039 SepOut of StockLFBGA1ku | $12.02Bulk (Tray)RZRZ/TT2LArmCortex-R52NoDouble/Single32001024KBYes196#0.8mm12 x 12 x 1.43#3.135 - 3.465111DMAC321#No18,16SDRAMNoNoNo1Tj = -40 to +12516#No800MHzYesYes10M/100M/1G1ch1#1#( 1 / 1 )( 1 / 1 )( 0 / 0 )No64223#002NoNo00No252014#0No0Yes0080000000000No00NoNoNoNo0Unique IDJTAG/SWDIndustrial Ethernet, Absolute Encoder IF3TAIWANKOREA
R9A07G074M04GBG#BC0ActiveN/A2038 SepOut of StockLFBGA1ku | $12.02Full Carton (Tray)RZRZ/TT2LArmCortex-R52NoDouble/Single32001024KBYes196#0.8mm12 x 12 x 1.43#3.135 - 3.465111DMAC321#No18,16SDRAMNoNoNo1512Tj = -40 to +12516#No800MHzYesYes10M/100M/1G1ch1#1#( 1 / 1 )( 1 / 1 )( 0 / 0 )No64223#002NoNo00No252014#0No0Yes0080000000000No00NoNoNoNo0Unique IDJTAG/SWDIndustrial Ethernet, Absolute Encoder IF3TAIWANKOREA
R9A07G074M05GBG#AC0ActiveN/AIn StockLFBGA1ku | $11.22Bulk (Tray)RZRZ/TT2LArmCortex-R52NoDouble/Single32001024KBYes196#0.8mm12 x 12 x 1.43#3.135 - 3.465111DMAC321#No18,16SDRAMNoNoNo1Tj = -40 to +12516#No800MHzYesYes10M/100M/1G1ch01#( 1 / 1 )( 1 / 1 )( 0 / 0 )No64223#020NoNo00No252014#0No0Yes0080000000000No00NoNoNoNo0AES, RSA, ECC, Hash, TRNG, Secure boot, Unique IDJTAG/SWDAbsolute Encoder IF3TAIWANKOREA
R9A07G074M05GBG#BC0ActiveN/AOut of StockLFBGA1ku | $11.22Full Carton (Tray)RZRZ/TT2LArmCortex-R52NoDouble/Single32001024KBYes196#0.8mm12 x 12 x 1.43#3.135 - 3.465111DMAC321#No18,16SDRAMNoNoNo1512Tj = -40 to +12516#No800MHzYesYes10M/100M/1G1ch01#( 1 / 1 )( 1 / 1 )( 0 / 0 )No64223#020NoNo00No252014#0No0Yes0080000000000No00NoNoNoNo0AES, RSA, ECC, Hash, TRNG, Secure boot, Unique IDJTAG/SWDAbsolute Encoder IF3TAIWANKOREA
R9A07G074M08GBG#AC0ActiveAvailable2039 SepIn StockLFBGA1ku | $12.52Bulk (Tray)RZRZ/TT2LArmCortex-R52NoDouble/Single32001024KBYes196#0.8mm12 x 12 x 1.43#3.135 - 3.465111DMAC321#No18,16SDRAMNoNoNo1Tj = -40 to +12516#No800MHzYesYes10M/100M/1G1ch1#1#( 1 / 1 )( 1 / 1 )( 0 / 0 )No64223#002NoNo00No252014#0No0Yes0080000000000No00NoNoNoNo0AES, RSA, ECC, Hash, TRNG, Secure boot, Unique IDJTAG/SWDIndustrial Ethernet, Absolute Encoder IF3TAIWANKOREA
R9A07G074M08GBG#BC0ActiveN/A2038 SepOut of StockLFBGA1ku | $12.52Full Carton (Tray)RZRZ/TT2LArmCortex-R52NoDouble/Single32001024KBYes196#0.8mm12 x 12 x 1.43#3.135 - 3.465111DMAC321#No18,16SDRAMNoNoNo1512Tj = -40 to +12516#No800MHzYesYes10M/100M/1G1ch1#1#( 1 / 1 )( 1 / 1 )( 0 / 0 )No64223#002NoNo00No252014#0No0Yes0080000000000No00NoNoNoNo0AES, RSA, ECC, Hash, TRNG, Secure boot, Unique IDJTAG/SWDIndustrial Ethernet, Absolute Encoder IF3TAIWANKOREA

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Complementary Silicon Devices

DRAM & Flash Memory Solutions

Provides a comprehensive external memory solution for Renesas RZ and R‑Car families, supporting systems that require scalable off‑chip memory. Supported memory types include Serial NAND (Quad/Octal SPI, 512Mb to 8Gb, 1.8V and 3.3V, 100K/60K cycle endurance), ONFI NAND (ONFI 1.0, 1Gb to 8Gb, 1.8V and 3.3V, 100K/60K cycle endurance), DRAM (DDR2/3/4 from 512Mb to 32Gb and LPDDR2/3/4/4x/5/5x from 1Gb to 16Gb), and HyperRAM™ (HyperBus, 64Mb to 512Mb, 1.8V and 1.2V).

Resonator Information
Please search for your resonator on its manufacturer's site linked below. If you require optimal oscillation circuit constants for your particular system, please ask the manufacturer of the oscillator.
For main clock resonators / For subclock resonators:
NIHON DEMPA KOGYO: Please see IC matching information in the RZ/T2L row.

Support Communities

  1. Blinky example Not working

    I am running the blinky example on my renesas setup.Setup details: RZ/T Series for Real-Time Control RZ Family ***-Bit & 32-Bit Arm® -Based High-End MPUs- Device(R9A07G074M04GBG)Issue: I am able to create project, build project and able to load the project as ...

    Mar 26, 2025
  2. EtherCAT G

    HI Team I am looking for a Processor and controller which supports EtherCAT G.Awaiting Your Reply ..

    Jan 29, 2025

Knowledge Base

  1. RZ/T2M, RZ/T2L, RZ/T2ME, RZ/T2H, RZ/N2L: Error regarding smart bundle occurs when building the project

    It is a configurator error. This occurs when a section placement is changed to a different area from the area generated by the code generation in the linker script of RZ/T FSP v2.2.0 and RZ/N FSP v2.1.0 or later. (e.g. from ...

    Dec 25, 2024
  2. RZ/T2L: What operating systems are supported?

    FreeRTOS is supported. The source code can be generated with Flexible Software Package (FSP).

    Mar 23, 2023
  3. RZ/T2L: How should I handle unused pins?

    Be careful because the handling differs depending on the pin.  Handle the unused pins in reference to the following items. RZ/T2L Group User’s Manual: Hardware (r01uh0985ej0100-rzt2l) 16.5 Handling of Unused PinsTable 16.24 Handling of unused pins

    Mar 23, 2023
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