Features
- Compliant with AS-Interface Complete Specification v3.0
- Universal application: slaves, masters, repeaters, and bus-monitors
- Floating AS-i transmitter and receiver for highly symmetrical high-power applications
- On-chip electronic inductor with current drive capability of 55mA
- Two configurable LED outputs to support all AS Interface Complete Specification v3.0 status indication modes
- Several data pre-processing functions, including configurable data input filters and bit-selective data inverting
- Additional addressing channel for easy wireless module setup
- Support of 8MHz and 16MHz crystals by automatic frequency detection
- Special AS-i safety option
- Clock watchdog for high system security
Description
The ASI4U is a next-generation CMOS integrated circuit for AS-i networks. This low-level field bus AS-i (Actuator Sensor Interface) was designed for easy, safe, and cost-effective interconnection of sensors, actuators, and switches. It transports both power and data over the same two-wire unshielded cable.
The ASI4U is used as part of a master or slave node and functions as an interface to the physical bus. It provides the power supply, physical data transfer, and communication protocol handling. The ASI4U is fully compliant with the AS-Interface Complete Specification v3.0. It is function and pin compatible with the A²SI IC.
All configuration data are stored in an internal EEPROM that can be easily programmed by a stationary or handheld programming device. The special AS-i safety option assures short response times for security-related events.
Parameters
| Attributes | Value |
|---|---|
| Function | Interface for ASI 3.0 |
| Temp. Range (°C) | -25 to 85°C, -25 to 105°C, -40 to 85°C |
Application Block Diagrams
 | Industrial Programmable Logic Controller (PLC) Flexible embedded programmable logic controller (PLC) designed to integrate any type of interface for end-application needs. |
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Renesas Boards & Kits
Evaluation Board for ASI4U
The ASI4U Evaluation Board demonstrates the integration of the ASI4U IC in an application specific design case. This evaluation board helps to reduce development effort and development time for ASI4U application projects. It demonstrates an IC reference design, illustrates simple application... Read More
ASI Programmer Kit USB
The AS-Interface Programmer provides support for implementing Renesas' AS-Interface ICs, including the ASI4U and SAP51/SAP5S. An easy-to-use graphical user interface allows control of the AS-Interface functionality; e.g., EEPROM programming, telegram-by-telegram debugging for AS-Interface... Read More
Support Communities
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asi4u ir addressing
Hello, I would like to know what the addressing option means for asi4u chips and how it happens
Oct 2, 2024 -
ASI4U-V5, how to configure it into an ASi-3 Slave?
Hello,I have a question regarding the Y-ASI4U-V5-DB_V1_1 and/or ASI4U-V5This device is advertised as being back compatible with ASI-3.The starter kit comes with a Qt program, (ASI4U-V5 Dataflash Generator 2.0) - which can generate the configuration binary file which ...
Oct 4, 2023 -
Guidance Required on Configuring ASI4U-V5 Evaluation Boards as Master and Slave
Hello, I hope you are doing well. I am currently working with two ASI4U-V5 evaluation boards (ASI4U-V5-EVB-V1P0) and would like to configure one board as a master and the other as a slave on the AS-Interface network. I have a few questions regarding the setup ...
Mar 30, 2026
Knowledge Base
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How much effort is it to certify an ASi-device which is based on ASI4U-V5
As all devices in the field run the same firmware, interoperability and certification testing is not a big hurdle. Renesas provides proper design guides for the hardware to ensure ASI-5 performance requirements are met.
Jan 25, 2021 -
Do I need to pay a license fee for the certified ASi-5 stack that runs on ASI4U-V5?
No, the firmware comes with the IC and there are not license fees involved.
Jan 25, 2021 -
How sensitive is the analog path with regards to the power supply? Do I need to isolate the digital and analog supply voltages?
No special isolation is needed. We recommend simple layout rules that allow the same supply to be used as analog and digital supply voltage. Internally, the chip will generate critical analog voltages by itself using embedded LDOs.
Jan 25, 2021
Support Communities
