Renesas low jitter clock generators are all PLL-based products that generate one or more clock signals within an application. This category contains low-phase noise oscillators suitable for most serial data applications. These low-jitter clocks are available with various kinds of single-ended or differential signaling levels, such as LVCMOS, LVPECL, LVDS, HCSL, SSTL, HSTL, etc.

Once the clock generator is selected, low additive phase noise fanout buffers can be used to provide additional copies and output types. Renesas has the largest selection of low-jitter clocks and low-phase noise oscillators in the industry, which allows for highly optimized solutions. For application-specific lower-jitter clocks (such as PCIe, RF and network synchronization), click here.

(Hint: If more than one unique output frequency is required (e.g. 100MHz and 125MHz), make use of the “Output Banks” parametric selector. Each bank corresponds to a unique output frequency. The number of outputs per bank is highly variable depending on the device.)

Key Parameters of a Low-Jitter Clock / Low-Phase Noise Oscillator

There are many important factors when choosing a low-jitter clock for a particular application. The following parameters will give users a basic starting point to narrow down the potential solutions:

  • Phase jitter: Defined as the undesired deviation from an ideal periodic timing signal. The Renesas low-jitter clocks offer typical RMS phase jitter of less than 700 fs, with some lower than 300fs for very high-performance applications.
  • Output frequency range: The valid range of output frequencies. Renesas offers low-phase noise oscillators to address the frequency needs of all popular applications.
  • Output type: This is the signaling type of the output that is required of the low-jitter clock. Renesas offers CML, HCSL, HSTL, LVCMOS, LVDS, LVHSTL, LVPECL, and LVTTL.
  • Core voltage: The supply voltage used to power the low-phase noise oscillator. This is typically defined by the power rails available in the system, and often has implications on voltage levels of the output. Renesas' low-phase noise clocks are offered in both 2.5V and 3.3V options.

About Low-Jitter Clocks (Low-Phase Noise Oscillators)
A low-jitter clock is a sophisticated IC that produces a timing signal for use in synchronizing a system’s operation. At its most basic level, a low-jitter clock consists of a resonant circuit and an amplifier. The resulting timing signal can range from a simple 50 percent duty cycle square wave to more sophisticated arrangements. In this case, the resonant circuit is typically a quartz piezo-electric low-phase noise oscillator. Renesas offers several families of low-jitter clocks, with varying levels of power, performance, and flexibility to address virtually any application requiring a low-phase noise oscillator.

Videos & Training

IDT VersaClock 5 Low Jitter Lab Demonstration

Description:

Lab demonstration and clock jitter measurement showing VersaClock 5. The frequency analyzer showing phase jitter at approximately 575 picoseconds RMS. Presented by Baljit Chandhoke, product manager at IDT. For more information about VersaClock, visit www.idt.com/go/VersaClock5

Transcript:

Hello, my name is Baljit Chandhoke, and I'm the Product Line Manager of timing products at IDT. Today, I will be giving you a brief lab demonstration of our new product, "VersaClock 5".

VersaClock 5 is a low power clock generator, with best in class jitter performance of 0.7 psec. It has extremely low power with core current consumption of only 30 MA. It is extremely programmable, and you can get any frequency you want at the output, up to 350MHz.

Now I'm going to start the lab demonstration. I have with me, an evaluation board. The evaluation board is powered by the USB cable, and is also used to control the VersaClock 5.

This is the Timing Commander software, which controls the VersaClock 5 device. As you see, I have it configured for 125MHz, LVPECL output, on Output 1.

On Output 2, I have it configured at 125MHz, HCSL output. Output 3, I have it configured at 156.25MHz LVDS, and Output 4 has 312.5MHz. All the outputs are operational and have different output frequencies.

Now, let's take a look at the performance. With all these outputs operational, and on Output 1, which is operating at 125MHz, I see 575 fsec RMS phase jitter from 12K to 20MHz.

This is industry leading in the power consumption of 30MA core in the space.

Now let's change the frequency, and see what happens to the phase noise. I'm going to change the frequency on Output 1 to 100MHz.

As you see, the frequency changed to 100MHz as shown on the screen, and the phase noise is still 576 fsec, from 12K to 20MHz. The noise floor is close to 150dBc.

So this product maintains the great performance, across a wide range of frequencies, as well as across multiple output types, and with different frequencies of the output.

So it provides you, a complete system solution, meeting the requirements of all your clocking needs in your system.