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Features

  • Ultra-low jitter performance: Achieve exceptional precision with jitter performance as low as 70fs at 312.5MHz within a wide 12kHz to 20MHz integration range in jitter attenuator mode
  • Versatile power supply options: Operate the device with ease using a single 1.8V power supply while ensuring compatibility with a 3.3V level interface at SCL/SDA pin if the VDDD33_SERIAL is 3.3V
  • SyncE support: Seamlessly integrate with SyncE technology for enhanced synchronization capabilities
  • DCO mode support: Leverage the benefits of the DCO mode for added flexibility and efficiency
  • Configurable startup options: Load configurations at startup effortlessly with the support of an external EEPROM, streamlining your setup process
  • Flexible communication interfaces: Choose between SPI or I2C communication protocols for seamless device integration
  • Multiple OTP configurations: Benefit from up to 4 OTP configurations for startup
  • Clock input monitoring: Monitor clock inputs with precision, ensuring reliable and stable performance
  • Phase slope limit (ns/s): Support smooth phase adjust under DPLL control
  • Wide loop bandwidth: Enjoy the flexibility of adjusting the loop bandwidth from 0.5Hz to 18kHz, catering to various application needs
  • Combo mode support: Flexible frequency support

Description

The RC323xxA (RC32308A and RC32312A) is a high-performance, small form factor, low-power jitter attenuator with network synchronization capabilities, belonging to Renesas' high-performance FemtoClock™ 3 family. It supports Synchronous Ethernet (SyncE) for network-based synchronization and outputs ultra-low jitter clocks that can directly synchronize SerDes running at up to 112G pulse amplitude modulation (PAM), as well as CPRI/OBSAI, SONET/SDH, and ADC/DAC. This makes it an excellent choice for 100G/200G/400G/800G telecom switch line cards, fabric cards, wireline infrastructure, data center equipment, and instrumentation applications. It allows locking to external reference clocks or free-run crystals/oscillators and supports hitless reference switching between redundant timing sources. The device is versatile, supporting timing channels for SyncE clock generation, jitter attenuation, and precise phase skew management for input-to-input, input-to-output, and output-to-output configurations.

This device is factory-configurable.
Try the Custom Part Configuration Utility.

Parameters

AttributesValue
Inputs (#)3
Input TypeCrystal, LVPECL, HCSL, LVDS, CML, LVCMOS
Product CategoryFemtoClock 3, Ultra-Low Jitter Clocks (<300 fs RMS), Extreme Performance Clocks (<150 fs RMS), Jitter Attenuators, Network Synchronization, PDH and SONET/SDH Clocks, Programmable Clocks
Diff. Outputs8, 12
Output TypeHCSL, LVDS, LVCMOS
Output Voltage (V)1.8
Input Freq (MHz)0.001 - 1000
Phase Jitter Typ RMS (ps)0.025
Output Freq Range (MHz)0.001 - 1000
Fractional Output Dividers (#)3
Core Voltage (V)1.8V, 3.3V
Output Banks (#)8, 12
Loop Bandwidth Range (Hz)0.05 - 1000
Xtal Freq (KHz)25 - 80
Advanced FeaturesSyncE, DCO, Phase Adjust, External Feedback, Hitless Switching
105°C Max. Case Temp.0

Package Options

Pkg. TypePkg. Dimensions (mm)Lead Count (#)Pitch (mm)
VFQFPN7.0 x 7.0 x 0.9480.5
VFQFPN9.0 x 9.0 x 0.9640.5

Application Block Diagrams

1600G Fixed Form Factor Switch Block Diagram
1600G Fixed Form Factor Switch
Elevate networking efficiency with cost-effective stackable switches for precise timing and flexibility.

Additional Applications

  • For 800Gbps SerDes Ethernet application
  • Jitter attenuation for 10/25/40/100/200/400/800 Gbps Ethernet PHYs or switches
  • Synchronous Ethernet (SyncE) equipment
  • Data center Top of Rack (ToR) and leaf switch
  • Ethernet switches and routers
  • Medical image system
  • Test and measurement

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This device is factory-configurable.
Try the Custom Part Configuration Utility.
Part NumberStatusSamplesLongevityStockPackageBudgetary Price (USD)Lead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Qty. per Reel (#)Qty. per Carrier (#)Diff. InputsDiff. OutputsOutputs (#)Output Banks (#)Pkg. Dimensions (mm)Pb (Lead) FreePb Free CategoryTemp. Range (°C)Country of AssemblyCountry of Wafer Fabrication
RC32308A000GNE#BB0ActiveAvailable2040 AprOut of StockVFQFPN48#Tray30260#388#8#7.0 x 7.0 x 0.9Yese3 Sn-40 to 85°C
RC32308A000GNE#KB0ActiveN/A2040 AprOut of StockVFQFPN48#Reel32000#0388#8#7.0 x 7.0 x 0.9Yese3 Sn-40 to 85°C
RC32308A001GNE#BB0ActiveAvailable2040 AprIn StockVFQFPN48#Tray30260#388#8#7.0 x 7.0 x 0.9Yese3 Sn-40 to 85°C
RC32308A001GNE#KB0ActiveN/A2040 AprOut of StockVFQFPN48#Reel32000#0388#8#7.0 x 7.0 x 0.9Yese3 Sn-40 to 85°C
RC32312A000GN1#BB0ActiveAvailable2040 AprOut of StockVFQFPN1ku | $14.9764#Tray30207#41212#12#9.0 x 9.0 x 0.9Yese3 Sn-40 to 85°CTAIWANSINGAPORE
RC32312A000GN1#KB0ActiveN/A2040 AprOut of StockVFQFPN1ku | $14.9764#Reel33000#041212#12#9.0 x 9.0 x 0.9Yese3 Sn-40 to 85°CTAIWANSINGAPORE
RC32312A002GN1#BB0ActiveAvailable2040 AprIn StockVFQFPN64#Tray30207#41212#12#9.0 x 9.0 x 0.9Yese3 Sn-40 to 85°C
RC32312A002GN1#KB0ActiveN/A2040 AprOut of StockVFQFPN64#Reel33000#041212#12#9.0 x 9.0 x 0.9Yese3 Sn-40 to 85°C

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Renesas Boards & Kits

Support Communities

  1. RC32312A000GN1#BB0 Channel to Channel Time delay error is in less than Pico seconds

    Hi Team,I have a requirement, I need use this Synthesizer chip for one application with a requirement of channel to channel time delay error should be less than 3 pico second. is it achievable or sugguest some part which can be acheived.

    Mar 6, 2025
  2. RC32308A-EVK的使用问题

    1.RC32308A-EVK上丝印是2023年10月的,实际只找到2023年7月10号的手册 2.手册里面有提到U3和U27,但是实际只找到U27,没找到U3 3 ...

    Jan 14, 2026
  3. 关于RC32308A-EVK,有没有一些适用于更高版本RICBox的使用教程和插件

    问题1:手册上在创建工程时需要加载FemtoClock3,可是下载对应8.4.0版本这个是没有这个插件的,那应该去下载那个版本呢 问 ...

    Jan 5, 2026
View All Results from Support Communities (9)

Knowledge Base

  1. How to configure Direct-Coupled HCSL termination on the RC32308A or RC32312A?

    For HCSL receivers, RC38208/RC38108 clock outputs should be configured for HCSL, and the devices should be directly coupled. The RC38208/RC38108 supports several programmable HCSL voltage swing options.   Figure 10 shows an HCSL driver directly coupled with an HCSL receiver and configured for internal source termination. The ...

    Apr 18, 2024
  2. How would I overdrive the crystal input for the RC32308A or RC32312A?

    When overdriving the crystal interface, the XOUT pin is left to float and the XIN input is overdriven by an AC coupled LVCMOS driver, or by one side of an AC coupled differential driver. The XIN pin is internally biased to .6V. The voltage swing on XIN should be between ...

    Apr 18, 2024
  3. How to configure Direct-Coupled LVDS termination on the RC32308A or RC32312A?

    For LVDS receivers, RC32308A or RC32312A clock outputs should be configured for LVDS and should be directly coupled.  The RC32308A / RC32312A supports several programmable LVDS voltage swing and common mode options.   Figure 12 shows an LVDS driver directly coupled with an LVDS receiver. The recommended value for the termination ...

    Apr 18, 2024
View All Results from Knowledge Base (6)
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