Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG64 |
| Lead Count (#): | 64 |
| Pkg. Dimensions (mm): | 9.0 x 9.0 x 0.9 |
| Pitch (mm): | 0.5 |
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Pkg. Type | VFQFPN |
| Lead Count (#) | 64 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 207 |
| Diff. Inputs | 4 |
| Diff. Outputs | 12 |
| Outputs (#) | 12 |
| Output Banks (#) | 12 |
| Pkg. Dimensions (mm) | 9.0 x 9.0 x 0.9 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Assembly Location | TAIWAN |
| Wafer Fab Location | SINGAPORE |
| 105°C Max. Case Temp. | 0 |
| Advanced Features | SyncE, DCO, Phase Adjust, External Feedback, Hitless Switching |
| App Jitter Compliance | 112G SerDes Jitter, PCIe Gen 6 |
| Application | Switch, Router, Medical Equipment, Broadcasting Video |
| Channels (#) | 1 |
| Clock Support | T-TSC, G.8262, G.8262.1 |
| Core Voltage (V) | 1.8V, 3.3V |
| Family Name | FemtoClock Clock Generator |
| Fractional Output Dividers (#) | 3 |
| Input Freq (MHz) | 0.001 - 1000 |
| Input Type | Crystal, LVPECL, HCSL, LVDS, CML, LVCMOS |
| Inputs (#) | 3 |
| Length (mm) | 9 |
| Longevity | 2040 Apr |
| Loop Bandwidth Range (Hz) | 0.05 - 1000 |
| MOQ | 207 |
| Output Freq Range (MHz) | 0.001 - 1000 |
| Output Skew (ps) | 40 |
| Output Type | HCSL, LVDS, LVCMOS |
| Output Voltage (V) | 1.8 |
| Phase Jitter Max RMS (ps) | 0.05 |
| Phase Jitter Typ RMS (fs) | 25 |
| Phase Jitter Typ RMS (ps) | 0.025 |
| Pitch (mm) | 0.5 |
| Price (USD) | $27.61222 |
| Product Category | FemtoClock 3, Ultra-Low Jitter Clocks (<300 fs RMS), Extreme Performance Clocks (<150 fs RMS), Jitter Attenuators, Network Synchronization, PDH and SONET/SDH Clocks, Programmable Clocks |
| Prog. Clock | Yes |
| Prog. Interface | OTP, I2C, SPI |
| Reference Output | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Selection Criteria | <150 fs RM |
| Spread Spectrum | No |
| Tape & Reel | No |
| Thickness (mm) | 0.9 |
| Width (mm) | 9 |
| Xtal Freq (KHz) | 25 - 80 |
| Xtal Inputs (#) | 1 |
The RC323xxA (RC32308A and RC32312A) is a high-performance, small form factor, low-power jitter attenuator with network synchronization capabilities, belonging to Renesas' high-performance FemtoClock™ 3 family. It supports Synchronous Ethernet (SyncE) for network-based synchronization and outputs ultra-low jitter clocks that can directly synchronize SerDes running at up to 112G pulse amplitude modulation (PAM), as well as CPRI/OBSAI, SONET/SDH, and ADC/DAC. This makes it an excellent choice for 100G/200G/400G/800G telecom switch line cards, fabric cards, wireline infrastructure, data center equipment, and instrumentation applications. It allows locking to external reference clocks or free-run crystals/oscillators and supports hitless reference switching between redundant timing sources. The device is versatile, supporting timing channels for SyncE clock generation, jitter attenuation, and precise phase skew management for input-to-input, input-to-output, and output-to-output configurations.