Features
- Universally compatible pin out and command set
- 60x faster Erase operation
- Optimized for fast Read and lowest energy usage.
- Low Sleep power for bootloader tasks
- Continuous read, wrap and burst modes for XiP
- Standard block architecture with added 256-byte page erase for energy efficient Data Logging
- Eliminate MCU poling and reduce overhead with auto-alert Active Interrupt
Description
The AT25EU0021A is the lowest energy member of our System Enhancing class of code and data storage solutions designed for all system memory tasks including boot/code shadowing and small byte load updates. It is universally compatible and combines low power with faster Read performance to save more than 70% energy.
Parameters
| Attributes | Value |
|---|---|
| Memory Class | Ultra-Low Energy |
| Memory Density | 2 |
| Operating Voltage Range (V) | 1.65 - 3.6 |
| Speed | 85 MHz |
| Interface | Single, Dual, Quad SPI |
| Temp. Range (°C) | -40 to +85°C |
| Deep Power Down (µA) | 0.1 |
| Read Current (mA) | 1.2 |
| Key Benefit | 90% energy savings |
Application Block Diagrams
| Automatic Pet Door & Tracking System Smart pet door with tag system for automatic entry and lost-pet tracking via proximity detection. | |
| Health Monitoring Medical Patch Compact medical patch with continuous health monitoring and location tracking for patient safety. | |
| Bluetooth Low Energy Tags for Proximity and Asset Tracking Ultra-low power Bluetooth Low Energy asset tracker tag with high-precision accuracy. | |
| Smart Asset Tracking Label Ultra-low power Bluetooth label for real-time asset tracking with extended battery life. |
Additional Applications
- Small coin cell applications
- Low-power Read
- Low-energy Fast Erase
- Boot/Code shadow memory
- Fast low-power Read
- 100nA Deep Power Down
- Simple event/data logging applications
- Fast Erase
- Page Erase
- Low-energy Erase and Program
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| Part Number | Status | Longevity | Stock | Package | Budgetary Price (USD) | Sample Catalog | Carrier Type | Moisture Sensitivity Level (MSL) | Country of Assembly |
|---|---|---|---|---|---|---|---|---|---|
| AT25EU0021A-MAHN-T | Active | 2031 Jan | In Stock | DFN | 1ku | $0.16 | <a href="https://www.renesas.com/samplecomponents/scripts/samplecenter/adestotech?cmd=menu" title="Request Samples" rel="noreferrer">Request Samples</a> | Tape & Reel | 1 | TAIWAN |
| AT25EU0021A-MAUN-T | Active | In Stock | DFN | 1ku | $0.138 | Tape & Reel | 3 | CHINA | ||
| AT25EU0021A-SSHN-B | Active | 2031 Jan | In Stock | SOIC-N | 1ku | $0.17 | <a href="https://www.renesas.com/samplecomponents/scripts/samplecenter/adestotech?cmd=menu" title="Request Samples" rel="noreferrer">Request Samples</a> | Tube | 1 | PHILIPPINES |
| AT25EU0021A-SSHN-T | Active | 2031 Jan | In Stock | SOIC-N | 1ku | $0.17 | <a href="https://www.renesas.com/samplecomponents/scripts/samplecenter/adestotech?cmd=menu" title="Request Samples" rel="noreferrer">Request Samples</a> | Tape & Reel | 1 | PHILIPPINES |
| AT25EU0021A-SSUN-T | Active | In Stock | SOIC-N | 1ku | $0.147 | Tape & Reel | 3 | CHINA |
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- Application NotePDF 182 KB AN404 Nov 21, 2025Presents an overview of Renesas/Dialog 1Mbit Serial Flash memory devices and a detailed comparison of their features, power characteristics, and interface options. This application note examines four devices—AT25DF011, AT25DN011, AT25XE011, and AT25EU0011A—covering aspects such as system voltage ranges, supported SPI modes, and power saving capabilities. This comparison helps designers evaluate the differences within the 1Mbit family and select the most appropriate device for their application.
- Application NotePDF 695 KB AN503 Sep 05, 2025Explores thermal resistance in integrated circuits (ICs) and details its role in managing heat from power consumption to ensure reliable operation. Proper thermal management enhances IC performance and longevity. Thermal resistance, measured in °C/W, quantifies heat flow resistance from the silicon die to the environment or PCB, with key types including junction-to-case (θJC), case-to-ambient (θCA), junction-to-ambient (θJA), and junction-to-board (θJB).
- Application NotePDF 185 KB AN405 Mar 14, 2025AI-generated Summary: Renesas 2-Mbit Serial Flash Memory products offer low power consumption, fast erase times, and multiple SPI interface options including single, dual, and quad. The AT25EU0021A features energy-saving functions such as low power read, erase, and program, making it suitable for battery-powered systems. The family includes four main products differing in voltage range, command sets, endurance, and additional features like UID registers and SFDP support. Detailed comparisons cover memory organization, command opcodes, device IDs, status registers, and packaging options to assist in selecting the appropriate device for specific applications.
- Application NotePDF 2.62 MB AN500 Feb 13, 2024AI-generated Summary: NOR Flash memory requires an erase operation before programming, which occurs in three phases: Pre-Program, Erase, and Recovery. The erase process affects entire blocks simultaneously, not byte-by-byte. Memory cells use floating gate MOSFETs to store data, organized into arrays of rows (Word-Lines) and columns (Bit-Lines). Physical Blocks contain multiple Logical Blocks and share common p-wells and Bit-Lines, impacting operation. Smaller Logical Blocks enable improved erase performance through parallelization. Understanding these processes and potential interruptions is crucial for designing reliable systems.
- Application NotePDF 710 KB AN502 Jan 24, 2024AI-generated Summary: Renesas NOR flash devices require decoupling capacitors close to VCC and GND pins to stabilize voltage, typically 1 μF with an optional 100 nF capacitor. Pull-up resistors are recommended on CS#, WP#/IO2, and HOLD#/IO3 pins to ensure proper signal states and facilitate debugging. Signal routing should minimize trace length and maintain a solid ground plane for high-speed signals. Power supply must rise monotonically during power-up. Basic system bring-up involves verifying installation, voltage levels, and SPI communication using manufacturer/device ID commands. Software drivers depend on host MCU architecture; Renesas offers example drivers and support. Correct erase/program sequences include write-enable, erase/program commands, and status checks. Tools for programming include flash loader plug-ins and debug probes. Switching from single to quad-SPI involves setting the quad-enable bit, changing pin functions. Dummy cycles introduce necessary wait times during read commands to accommodate latency.
- Application NotePDF 218 KB AN408 Dec 14, 2023AI-generated Summary: Maximizing the service life of AT25EU NOR flash memory involves managing its 10,000 erase/program cycle endurance through wear-levelling techniques that evenly distribute write operations across memory blocks. The device supports fine-grained 256-byte page erase, enabling efficient cycling management. Calculating the cycling budget and frequency allows predicting memory longevity or setting cycling limits to meet lifetime requirements. Proper wear-levelling prevents premature failure of heavily used blocks and maximizes overall device lifespan.
- GuidePDF 790 KB SPI_NOR_Flash_Product_Guide_PBFLASH03102022rev-C Jun 16, 2023
- Product BriefPDF 710 KB R16DS0269EU0000 Rev.0.00 Jul 19, 2022
- DocumentPDF 1 MB R10DS0315EU0000 Rev.0.00 Jun 28, 2022
- Application NotePDF 794 KB May 12, 2022AI-generated Summary: Renesas NOR flash devices implement multiple protection methods to safeguard memory arrays, status registers, flash states, and resets from accidental or intentional modifications. Protection types include hardware-based write protection via the WP pin and software-based protection through commands controlling status registers and memory blocks. Memory array protection schemes include individual block protection, allowing sector-level lock/unlock, and memory edge protection, which protects contiguous regions aligned to memory edges. Status register protection indirectly secures memory by blocking changes to protection states. Detailed command sets and register bits configure these protections, ensuring robust flash memory integrity.
- Application NotePDF 663 KB Oct 18, 2021AI-generated Summary: Proper power-up and power-down sequencing is critical for NOR Flash memory operation to ensure reliable system performance. The power supply voltage must ramp up monotonically without dips, reaching the minimum operational voltage within specified timing to avoid corrupted initialization. Reset methods, including hardware and JEDEC resets, help ensure the device starts from a known state. Brown-out conditions and power cycling require careful handling to prevent data corruption and ensure stable operation. The document covers power sequencing, reset types, brown-out recovery, power-down, and power-saving modes, providing essential guidelines for system engineers and application developers.
Recommended Documents (1)
Datasheets (1)
- GuidePDF 790 KB SPI_NOR_Flash_Product_Guide_PBFLASH03102022rev-C Jun 16, 2023
Manuals & Guides (2)
- Application NotePDF 182 KB AN404 Nov 21, 2025Presents an overview of Renesas/Dialog 1Mbit Serial Flash memory devices and a detailed comparison of their features, power characteristics, and interface options. This application note examines four devices—AT25DF011, AT25DN011, AT25XE011, and AT25EU0011A—covering aspects such as system voltage ranges, supported SPI modes, and power saving capabilities. This comparison helps designers evaluate the differences within the 1Mbit family and select the most appropriate device for their application.
- Application NotePDF 695 KB AN503 Sep 05, 2025Explores thermal resistance in integrated circuits (ICs) and details its role in managing heat from power consumption to ensure reliable operation. Proper thermal management enhances IC performance and longevity. Thermal resistance, measured in °C/W, quantifies heat flow resistance from the silicon die to the environment or PCB, with key types including junction-to-case (θJC), case-to-ambient (θCA), junction-to-ambient (θJA), and junction-to-board (θJB).
- Application NotePDF 185 KB AN405 Mar 14, 2025AI-generated Summary: Renesas 2-Mbit Serial Flash Memory products offer low power consumption, fast erase times, and multiple SPI interface options including single, dual, and quad. The AT25EU0021A features energy-saving functions such as low power read, erase, and program, making it suitable for battery-powered systems. The family includes four main products differing in voltage range, command sets, endurance, and additional features like UID registers and SFDP support. Detailed comparisons cover memory organization, command opcodes, device IDs, status registers, and packaging options to assist in selecting the appropriate device for specific applications.
- Application NotePDF 2.62 MB AN500 Feb 13, 2024AI-generated Summary: NOR Flash memory requires an erase operation before programming, which occurs in three phases: Pre-Program, Erase, and Recovery. The erase process affects entire blocks simultaneously, not byte-by-byte. Memory cells use floating gate MOSFETs to store data, organized into arrays of rows (Word-Lines) and columns (Bit-Lines). Physical Blocks contain multiple Logical Blocks and share common p-wells and Bit-Lines, impacting operation. Smaller Logical Blocks enable improved erase performance through parallelization. Understanding these processes and potential interruptions is crucial for designing reliable systems.
- Application NotePDF 710 KB AN502 Jan 24, 2024AI-generated Summary: Renesas NOR flash devices require decoupling capacitors close to VCC and GND pins to stabilize voltage, typically 1 μF with an optional 100 nF capacitor. Pull-up resistors are recommended on CS#, WP#/IO2, and HOLD#/IO3 pins to ensure proper signal states and facilitate debugging. Signal routing should minimize trace length and maintain a solid ground plane for high-speed signals. Power supply must rise monotonically during power-up. Basic system bring-up involves verifying installation, voltage levels, and SPI communication using manufacturer/device ID commands. Software drivers depend on host MCU architecture; Renesas offers example drivers and support. Correct erase/program sequences include write-enable, erase/program commands, and status checks. Tools for programming include flash loader plug-ins and debug probes. Switching from single to quad-SPI involves setting the quad-enable bit, changing pin functions. Dummy cycles introduce necessary wait times during read commands to accommodate latency.View More (11)
Application Notes & White Papers (11)
- Product Change NoticePDF 528 KB Jun 26, 2020
Product Notices (PCN, EOL, etc) (2)
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- Model - IBIS
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- Development ToolµISP is a compact standalone and universal solution, specifically designed for production environments, based on Algocrafts WriteNow! Technology. This is a standard tool for many families and devices and supports multi programming protocol (JTAG, SPI, UART, DAP, SWD, I2C, BDM, custom protocol, etc).Provided By: Algocraft Srl
- Development ToolWriteNow! Series of In-System Programmers is a breakthrough in the programming industry. The programmers support a large number of devices (microcontrollers, memories, CPLDs and other programmable devices) from various manufacturers and have a compact size for easy ATE/fixture integration. They work in standalone or connected to a ...Provided By: Algocraft Srl
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Simulation Models (2)
- Development ToolµISP is a compact standalone and universal solution, specifically designed for production environments, based on Algocrafts WriteNow! Technology. This is a standard tool for many families and devices and supports multi programming protocol (JTAG, SPI, UART, DAP, SWD, I2C, BDM, custom protocol, etc).Provided By: Algocraft Srl
- Development ToolWriteNow! Series of In-System Programmers is a breakthrough in the programming industry. The programmers support a large number of devices (microcontrollers, memories, CPLDs and other programmable devices) from various manufacturers and have a compact size for easy ATE/fixture integration. They work in standalone or connected to a ...Provided By: Algocraft Srl
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Support Communities
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AT25EU0021A spi flash issue
Title: DA14531 J-Link/SmartSnippets connection lost after SPI flash integration Using DA14531 with external SPI flash (SDK6). RTC + temperature code works independently.SPI flash logger also works independently.(face some damage issues in spi flash AT25EU0021A) After integrating both, the device frequently becomes unreachable after programming SPI flash ...
May 8, 2026 -
AT25EU0021A-MAHN 2-Mbit, 1.65V – 4.4V Range - VCC Voltage Ripple requirement
We are using FLASH AT25EU0021A-MAHN 2-Mbit, 1.65V – 4.4V Range in our Dragonfly LoRa TAG. Please advise what is the VCC ripple requirements. We are having 50mV ripple , please advise if there can be any issue with this ripple. Currently all the testing are ok, but we ...
Dec 28, 2023 -
DA14531 (WLCSP17) Cannot flash external SPI (or read OTP) - Failed clearing memory address 7FC3C08. Failed configuring SPI ports and pins.QuestionContext
Question How can we let SmartSnippets Toolbox turn off HW_RESET, or otherwise customize the jtag_programmer.bin ? Context We have been able to run our firmware (based on the ble_app_example, for SDK version: 6.0.14.1114) using Keil - so we know we can program the RAM ...
Mar 21, 2023