Overview

Higher bandwidth requirements for cellular services have increased the global demand for 5G multiple-input multiple-output (MIMO) solutions. This system implements the RF chains and clock tree necessary for 5G MIMO.

System Benefits​:

  • Sub-6GHz device targets the small signal RF chain from RF antenna to ADC for Rx and from DAC to PA for Tx
  • Best-in-class advanced timing products have very low phase noise and low spurious jitter
  • Supports input clock redundancy, mid to high clock fan-out, JESD204B/C, and IEEE 1588 for enhanced common public radio interface (eCPRI)
  • Provides single-chip synchronization and clock generation

Applications

  • Massive 5G MIMO

Winning Combinations Interactive Diagram

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4:3 ratio ASIC / FPGA Digital Front End JESD20 4B/C Transceiver with Feedback Path ASIC / FPGA Digital Front End JESD20 4B/C Transceiver with Feedback Path ASIC / FPGA Digital Front End JESD20 4B/C Transceiver with Feedback Path 32 X 2T2R (16 X 4T4R) JESD20 4B/C Transceiver with Feedback P... 32 X 2T2R (16 X 4T4R)JESD20 4B/C Transceiver with Feedback Path Sheet.181 Sheet.182 Undo Sheet.1 Sheet.2 Sheet.3 Sheet.4 EU099 EU099 EU099 EU112 Power Block Power Block Power Block Variable Gain Amplifiers (VGA) Variable Gain Amplifiers (VGA) Variable Gain Amplifiers (VGA) 64 Element Antenna Array 64 Element Antenna Array 64 Element Antenna Array Bias Controller Bias Controller Bias Controller RF RF Switch RFSwitch Sheet.73 Sheet.74 Sheet.75 Sheet.76 Sheet.77 Sheet.78 Sheet.79 Sheet.80 Sheet.81 Sheet.90 Sheet.93 Sheet.94 Sheet.95 Sheet.100 PA PA PA Matching Network Matching Network Matching Network Shunt Sheet.25 Sheet.26 Sheet.27 Sheet.60 Sheet.82 Sheet.83 Sheet.85 Sheet.86 Sheet.87 Sheet.88 Sheet.89 Sheet.92 PA PA PA Matching Network Matching Network Matching Network Shunt.108 Sheet.109 Sheet.110 Sheet.111 Sheet.113 Sheet.114 Sheet.115 Sheet.116 Sheet.117 Sheet.118 Sheet.119 Sheet.120 Sheet.126 Sheet.127 Sheet.129 Sheet.130 SyncE Tx Clock G.8262 Compl. HW Filtered SyncE Tx Clock G.8262 Compl. HW Filtered SyncE Tx Clock G.8262 Compl. HW Filtered (7.68 MHz) (7.68 MHz) (7.68 MHz) (491.52 MHz) (491.52 MHz) (491.52 MHz) RxA RxA RxA RxB RxB RxB TxB TxB TxB Tx Feedback Tx Feedback Tx Feedback TxA TxA TxA Sheet.165 Sheet.157 Sheet.158 Connector 1.171 Sheet.160 Connector 1.161 Sheet.162 Connector 1.163 Sheet.164 RF shows x2 channels for simplicity. This would be repeated 32-times for a 64T64R radio. RF shows x2 channels for simplicity. This would be repeated 3... RF shows x2 channels for simplicity. This would be repeated 32-times for a 64T64R radio. Sheet.167 Sheet.168 Sheet.169 Sheet.170 Sheet.175 Sheet.58 Undo Sheet.176 Sheet.177 Connector 1.171 Sheet.184 Sheet.185 Sheet.186 Sheet.187 Connector 1.188 Sheet.195 Sheet.196 Sheet.197 Sheet.198 Sheet.199 Sheet.200 Sheet.201 Sheet.202 Sheet.209 Sheet.210 Resistor - Fixed Transformer Line.841 Inductor Air Core.509 Sheet.37 Sheet.38 Sheet.39 Sheet.40 Sheet.41 Sheet.42 Sheet.43 Sheet.44 Sheet.45 Line.29 Inductor Air Core.212 Sheet.48 Sheet.49 Sheet.50 Sheet.51 Sheet.52 Sheet.53 Sheet.54 Sheet.55 Sheet.56 Sheet.205 Sheet.206 Sheet.207 Sheet.208 Sheet.211 Sheet.213 Sheet.214 Sheet.215 Sheet.216 Sheet.229 Sheet.228 Sheet.221 Sheet.218 Sheet.220 Sheet.222 Sheet.223 Sheet.224 Sheet.225 Sheet.226 Sheet.227 Sheet.230 Sheet.232 Sheet.233 Sheet.234 Sheet.235 Sheet.236 Sheet.237 Sheet.238 Sheet.239 Sheet.240 Sheet.241 Sheet.242 Sheet.244 Sheet.245 Sheet.246 Sheet.247 Sheet.248 Sheet.249 Sheet.250 Sheet.251 Sheet.252 Sheet.253 Sheet.254 Sheet.256 Sheet.257 Sheet.258 Sheet.259 Sheet.260 Sheet.261 Sheet.262 Sheet.263 Sheet.264 Sheet.265 8 Communication Lines B.795 8 8 8 8 Communication Lines B.795 8 8 8 Sheet.281 Sheet.282 4 4 4 4 Sheet.285 4 4 4 4 Sheet.288 Clock Clock Clock SYSREF SYSREF SYSREF Clock Clock Clock SYSREF SYSREF SYSREF Clock Matrix Network Clock Synchronizer Clock Matrix Network Clock Synchronizer Clock Matrix Network Clock Synchronizer Sheet.296 ASIC / FPGA Digital Front End ASIC / FPGA Digital Front End ASIC / FPGA Digital Front End ASIC / FPGA Digital Front End Sheet.304 Sheet.305 Sheet.306 Sheet.307 Sheet.308 SyncE Rx Clock SyncE Rx Clock SyncE Rx Clock Frequency Control Word Frequency Control Word Frequency Control Word Sheet.313 eC PRI Interface eC PRI Interface eC PRI Interface RF Amp RF Amp RF Amp RF-Amp RF Amp RF Amp RF Amp.322 RF Amp RF Amp RF-Amp.323 RF Amp RF Amp RF Amp.324 RF Amp RF Amp RF Amp.325 RF Amp RF Amp 1:8 Clock 1:8 SYSREF Component block.751 1:8 Clock 1:8 SYSREF 1:8 Clock 1:8 SYSREF 1:8 Clock 1:8 SYSREF 1:8 Clock 1:8 SYSREF 1:8 Clock 1:8 SYSREF Sheet.326 JESD JESD204B/C Clock Jitter Attenuator JESD204B/CClock Jitter Attenuator Sheet.309 Sheet.310 RF Sample Freq. Generation, Spurious Cleaning RF Sample Freq. Generation, Spurious Cleaning RF Sample Freq. Generation, Spurious Cleaning Fan Out Fan Out Fan Out

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