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Renesas Electronics Corporation

Features

  • 2 power supply inputs:
    • 2.5V (±8%) to 5.0V (±10%) VDD
    • 5.0V (±10%) to 24.0V (±10%) VDD2
  • 2 high-voltage high-current drive GPOs
    • Full-bridge driver option
    • Dual/Single half-bridge driver option
    • Slew rate modes:
      • Motor driver mode
      • Pre-driver (MOSFET driver) mode
    • High drive GPOs with sleep function
    • Low RDS(ON) high-side + low-side resistance = 0.5Ω typical
    • 3A peak, 1.5A RMS per full bridge
    • Current up to 3A peak, 1.5A RMS per GPO/half bridge and up to 6A peak, 3A RMS for 2 high-voltage (HV) GPOs connected in parallel
    • Integrated overcurrent/short circuit/undervoltage lockout protections
    • SENSE input that is connected to the current comparator for current control
    • Fault signal indicator (OCP/UVLO/TSD)
  • Differential amplifier with integrator and comparator for motor speed control function
  • Current sense comparator with dynamical Vref mode
  • 2 high-speed general-purpose ACMPs
    • Modes: UVLO, OCP, TSD, voltage monitor, current monitor
  • 1 voltage reference (Vref) output
  • 5 multi-function macrocells
    • 4 selectable DFF/LATCH/3-bit LUTs + 8-bit delay/counters
    • 1 selectable DFF/LATCH/4-bit LUT + 16-bit delay/counter
  • 12 combination function macrocells
    • 3 selectable DFF/LATCH or 2-bit LUTs
    • 1 selectable programmable pattern generator or 2-bit LUT
    • 6 selectable DFF/LATCH or 3-bit LUTs
    • 1 selectable pipe delay or ripple counter or 3-bit LUT
    • 1 selectable DFF/LATСH or 4-bit LUT
  • 2 PWM macrocells
    • Flexible 8-bit/7-bit PWM mode with the duty cycle control
    • 16 preset duty cycle registers switching mode for PWM Sine or other waveforms
  • Serial communications
    • I2C protocol interface
  • Programmable delay with edge detector output
  • Additional logic function – One deglitch filter with edge detectors
  • 2 oscillators (OSC)
    • 2.048kHz oscillator
    • 25MHz oscillator
  • Analog temperature sensor with ACMP-connected output
  • Power-on Reset (POR)
  • One-time programmable memory
  • Operating temperature range: -40°C to 105°C
  • RoHS-compliant/Halogen-free
  • 20-pin STQFN: 2mm x 3mm x 0.55mm, 0.4mm pitch

Description

The SLG47115-E provides a small, low-power component for commonly used mixed-signal and bridge functions. The user creates their circuit design by programming the one-time programmable (OTP) non-volatile memory (NVM) to configure the interconnect logic, the IO pins, the high-voltage pins, and the macrocells of the SLG47115-E. Configurable PWM macrocells in combination with special high-voltage outputs will be useful for motor drive or load drive applications. High-voltage pins allow for the design of smart level translators or for driving the high-voltage high-current load.

Parameters

AttributesValue
Special Features1x H-/2x Half-Bridge, 2x PWM, CCMP, Int&Diff Amp
GPIOs (#)10
Nominal VDD2.3 - 5.5
VDD2 (V)4.5 - 26.4
ACMP Channels (#)2
CNT/DLY (Max) (#)5
LUTs (Max) (#)17
D Flip-flops (DFFs) (#)15
Pipe Delay16-stage
# of Programable Delays (#)1
Oscillator TypeLF OSC, Ring OSC
Pattern Generator1
Temperature Sensor (ch) (#)1
InterfaceI2C
Memory TypeOTP
Temp. Range (°C)-40 to +105°C
Product CategoryDual Supply, HVPAK, Extended Temperature Range

Package Options

Pkg. TypePkg. Dimensions (mm)Lead Count (#)Pitch (mm)
TQFN2.0 x 3.0200.4

Applications

  • Outdoors electronics
  • Factory automation
  • E-Bikes
  • Power electronics
  • EV charging stations
  • Personal computers and servers
  • Motor drivers
  • High-voltage MOSFET drivers
  • LED matrix dimmers
Part NumberStatusSamplesLongevityStockPackageBudgetary Price (USD)Lead Count (#)Carrier TypePb (Lead) FreeTemp. Range (°C)Assembly LocationWafer Fab Location
SLG47115-EVActiveAvailable2037 SepOut of StockTQFN1ku | $0.67820#Tape & ReelYes-40 to +105°CTAIWANTAIWAN

Renesas Boards & Kits

Support Communities

  1. Beginner Question: SLG47115-E Pre-Driver Simulation - Outputs Stuck High?

    Hi everyone, I'm new to GreenPAK/HVPAK and I'm simulating the SLG47115-E to control an external H-bridge. I've configured the HV OUT CTRL block for Fast for pre-driver, Full bridge, and IN-IN mode. My simulation shows the internal HS/LS logic ...

    Oct 21, 2025
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