Features
- Input voltage 2.8V to 5.5V
- Three buck converters, 0.3V to 3.34V up to 2.5A
- DVS support
- 3MHz switching frequency allows the use of low-profile inductors
- Four LDO regulators, 0.9V to 3.6V up to 300mA
- Five GPIOs
DA9061 Block Diagram
Description
The DA9061 is a flexible, scalable system power management IC (PMIC) capable of powering a wide range of multicore SoCs, FPGAs, memory subsystems, and peripherals. Full power tree management and multiple sleep modes result in a power-efficient system solution suitable for infotainment, telematics, and ADAS applications. The device includes four LDOs with programmable output voltages providing up to 300mA and three high-current buck converters providing up to 2.5A per buck. All bucks use integrated power switches, removing the need for external FETs. Together with the high device switching frequency that allows the use of low-profile inductors, they enable the lowest cost, smallest form factor system solution possible. This solution is also available in automotive AEC-Q100 Grade 2. High efficiency is achieved over a wide load range by automatically selecting pulse frequency modulation (PFM) or pulse width modulation (PWM) modes. The input voltage range of 2.8V to 5.5V makes it suitable for standard 5V supply or USB power supplies.
Benefits
- Enhanced energy saving techniques:
- Dynamic voltage scaling (DVS)
- Programmable power manager
- Enhanced security:
- System supply monitoring
- Junction temperature monitoring
- Watchdog timer
- -40 °C to +125 °C junction temperature operation
- 3MHz switching frequency avoiding the AM band
- Package: QFN-40, 6mm x 6mm, 0.5mm pitch
- Automotive Grade 2 version available - DA9061-A
Supported SoC PMIC Platforms
- Xilinx MPSoCs and FPGAs
- Xilinx Zynq UltraScale+ MPSoC (ZU3EG, ZU7EV, ZU9CG)
- Xilinx Zynq UltraScale+ MPSoC (ZU3CG, ZU9EG, ZU19EG)
- NXP® i.MX Processor Family
- NXP i.MX 6
- NXP i.MX 6UL
- NXP i.MX 6ULL
- NXP i.MX 7Solo
Parameters
| Attributes | Value |
|---|---|
| Qualification Level | Standard |
| Product Type | MPU |
| Processor Supplier | Renesas, NXP, Qualcomm, Microchip |
| Processor Name | RZ T2M, i.MX 6Solo, i.MX 7Solo i.MX 6UL, Atlas VI, SAMA5D3 |
| Total step-down DC/DC converter channels (#) | 3 |
| Step-up DC/DC converter Channels (#) | 0 |
| Input Voltage (Min) (V) | 2.8 |
| Input Voltage (Max) (V) | 5.5 |
| Bus Voltage (Max) (V) | 5.5 |
| Output Current Max (A) | 2.5 |
| Outputs (#) | 7 |
| Function | 7-ch PMIC |
| Comm. Interface | I2C |
| Battery Interface | No |
| GPIOs (#) | 5 |
| Integrated Battery Charger | No |
| Switching Frequency (MHz) | 3 - 3 |
Package Options
| Pkg. Type | Lead Count (#) | Pitch (mm) |
|---|---|---|
| QFN | 40 | 0.5 |
Application Block Diagrams
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Additional Applications
- Portable industrial and medical devices
- TV dongles
- eReaders
- Supply for single- and dual-core application processors; for example the i.MX™ families
- Power supply for FPGAs
- Automotive infotainment/dashboard
- IoT devices
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| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Pb (Lead) Free |
|---|---|---|---|---|---|---|---|---|
| DA9061-00AM1 | Active | Available | Out of Stock | QFN | 40# | Tray | 3 | Yes |
| DA9061-00AMC | Active | Available | Out of Stock | QFN | 40# | Tape & Reel | 3 | Yes |
| DA9061-A0AM1 | Active | Available | In Stock | QFN | 40# | Tray | 3 | Yes |
| DA9061-A0AMC | Active | Available | Out of Stock | QFN | 40# | Tape & Reel | 3 | Yes |
| DA9061-XXAM1 | Active | Available | Out of Stock | QFN | 40# | Tray | 3 | Yes |
| DA9061-XXAMC | Active | Available | Out of Stock | QFN | 40# | Tape & Reel | 3 | Yes |
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- Application NotePDF 323 KB Feb 12, 2021AI-generated Summary: The document details the power management integration between the DA9061 PMIC and NXP i.MX 6Solo/6DualLite processors. It explains the power rail mappings, power-up and power-down sequences, and the I2C interface for control. The DA9061 supports dynamic voltage control to optimize power consumption and reduces system cost and size compared to discrete solutions. It also covers recommended external components, software drivers, and development tools. Key power rails include VDD_ARM_IN, VDD_SOC_IN, VDD_HIGH_IN, and VDD_SNVS_IN, with specific voltage levels and sequencing requirements to ensure reliable operation. PCB design files typically include BOM, schematics, and Gerber files.
- Application NotePDF 267 KB Feb 12, 2021AI-generated Summary: IRQ line-sharing among multiple devices in Linux-based systems can cause unhandled interrupts, leading to kernel failures. When an IRQ remains unserviced, the Linux kernel disables the IRQ line, potentially affecting all devices sharing it. This behavior arises after a threshold of unhandled interrupts triggers a diagnostic message and disables the IRQ. Solutions include allocating dedicated IRQs, masking interrupts via OTP or bootloader, and managing driver installation order. Specific recommendations for PMIC devices like DA9210 and DA9063 address interrupt masks and fault log clearance to mitigate such issues.
- Application NotePDF 2.48 MB Feb 12, 2021AI-generated Summary: Optimizing PCB layout is essential for reliable and high-performance integrated power management solutions. Key principles include maintaining low ground impedance through thick current-carrying traces, ground planes, and multiple vias. Sensitive signals must be shielded from noise, and power and ground planes should be placed under PMICs to minimize inductance. Specific layout guidelines address buck, boost converters, LDOs, and battery chargers. Examples from Dialog’s reference designs illustrate best practices. Design-in services are available to review schematics and layouts to enhance efficiency and reliability.
- Application NotePDF 388 KB Oct 08, 2020AI-generated Summary: The DA9061 and DA9062 PMICs provide flexible power management solutions tailored for the NXP i.MX 7Solo processor, ensuring stable and efficient operation. Key power rails such as VDD_SOC, VDD_ARM, and VDD_SNVS_IN are managed with precise voltage levels and sequencing to meet processor requirements. The DA9061 supports dynamic voltage control to optimize power consumption and system cost, while the DA9062 adds features like SNVS coin-cell charging and additional power rails. Power-up and power-down sequences, I2C interface control, and recommended external components are detailed. PCB design files bundled in zip downloads include BOM, schematic, and Gerber files for the DA9062 WaRP7 CPU Board and general DA9062 iMX7 design files.
- Application NotePDF 184 KB Apr 14, 2020AI-generated Summary: Unused pins on the DA9061 and DA9062 power management ICs require specific configurations to avoid operational issues. Digital inputs should be pulled up or tied to a non-active state, outputs left floating, and power pins connected as specified. For 2-wire interfaces, unused SDA and SCL pins must connect to ground. Voltage regulator and buck converter pins not in use should be grounded or left floating based on their function. Proper unused pin configuration ensures system stability and prevents unintended behavior in various applications.
- Application NotePDF 159 KB Apr 14, 2020AI-generated Summary: The checklist ensures proper schematic design for the DA9061/2 PMIC by guiding hardware designers to select correct external passive components and configure OTP settings. It covers core operation parameters such as voltage ranges, capacitor values, and reset pin configurations. The checklist also details requirements for LDOs and buck converters, including input/output voltages, capacitor values, and current limits. It helps prevent common schematic errors and supports system debugging with test points. References to datasheets and user manuals provide additional design context.
- Application NotePDF 269 KB Apr 14, 2020AI-generated Summary: The document details power connections between the DA9061 PMIC and NXP i.MX 6UL/6ULL processors, focusing on power rail mapping, power-up and power-down sequences, and I2C interface requirements. It explains the precise power management needed for various processor domains such as VDD_SOC_IN, VDD_HIGH_IN, and VDD_SNVS_IN, and highlights the DA9061's dynamic voltage control for power efficiency. The document also covers recommended external components, software drivers, and development tools, providing a comprehensive guide for integrating the DA9061 into i.MX 6UL/6ULL systems. PCB design files bundled in the zip include BOM, schematics, and Gerber files.
- Application NotePDF 1022 KB Apr 14, 2020AI-generated Summary: In-circuit programming (ICP) enables flexible configuration of DA9061/2/3 PMICs during board-level testing using seed ini files and the Dialog In-Circuit Programmer Kit. ICP suits prototype and small to medium volume manufacturing up to 30k units, allowing application-specific OTP customization such as regulator voltages, power sequencing, and GPIO settings. The programming process integrates with standard board assembly, minimizing manual handling and rework. Configuration can be further adjusted via I2C after startup. Seed ini files simplify OTP creation by embedding application parameters, supporting efficient and reliable device programming.
- Application NotePDF 270 KB Apr 14, 2020AI-generated Summary: The DA9061 and DA9062 manage power for the SAMA5D3 microprocessor series by providing efficient, low-power operation with integrated safety features such as temperature and voltage supervision. They support flexible power rail sequencing and use high-frequency buck converters to enable compact designs. The power supply requirements and sequencing for the SAMA5D3 are detailed, including regulator mappings and signal interconnections based on the SAMA5D3 Xplained Evaluation Kit. The DA9062 offers additional features like an extra buck converter, dual-phase buck capability, DDR VTT supply, real-time clock, and coin cell charger. Evaluation results and configuration guidelines ensure reliable MPU operation.
- Application NotePDF 637 KB Apr 14, 2020AI-generated Summary: The DA9061/2 Developers’ Guide details the power management IC’s functional descriptions, including power states, device power modes, and wake-up events. It explains regulator configurations, thermal design, and parameter measurements. The guide offers practical application information such as PCB layout recommendations, regulator usage, and configuration via GUI software. It supports system developers in optimizing device settings for single- and dual-core systems and provides insights into fault handling, sequencing, and power transitions. The document also includes references and definitions to assist in comprehensive system design.
- Application NotePDF 149 KB Apr 14, 2020AI-generated Summary: The document explains the behavior of DA906x power management ICs when tested with a slowly ramping supply voltage. It details how the device monitors VSYS voltage changes, including the generation of VDD_WARN and VDD_FAULT events during slow voltage ramps. The document highlights that during slow rising voltage, the device may repeatedly attempt to power up and shut down due to threshold checks. A workaround involves setting the M_VDD_WARN mask bit to allow proper testing until the system fully powers up. The note also compares normal and slow ramp scenarios with timing diagrams to clarify device responses.
Recommended Documents (1)
Datasheets (1)
Manuals & Guides (3)
- Application NotePDF 323 KB Feb 12, 2021AI-generated Summary: The document details the power management integration between the DA9061 PMIC and NXP i.MX 6Solo/6DualLite processors. It explains the power rail mappings, power-up and power-down sequences, and the I2C interface for control. The DA9061 supports dynamic voltage control to optimize power consumption and reduces system cost and size compared to discrete solutions. It also covers recommended external components, software drivers, and development tools. Key power rails include VDD_ARM_IN, VDD_SOC_IN, VDD_HIGH_IN, and VDD_SNVS_IN, with specific voltage levels and sequencing requirements to ensure reliable operation. PCB design files typically include BOM, schematics, and Gerber files.
- Application NotePDF 267 KB Feb 12, 2021AI-generated Summary: IRQ line-sharing among multiple devices in Linux-based systems can cause unhandled interrupts, leading to kernel failures. When an IRQ remains unserviced, the Linux kernel disables the IRQ line, potentially affecting all devices sharing it. This behavior arises after a threshold of unhandled interrupts triggers a diagnostic message and disables the IRQ. Solutions include allocating dedicated IRQs, masking interrupts via OTP or bootloader, and managing driver installation order. Specific recommendations for PMIC devices like DA9210 and DA9063 address interrupt masks and fault log clearance to mitigate such issues.
- Application NotePDF 2.48 MB Feb 12, 2021AI-generated Summary: Optimizing PCB layout is essential for reliable and high-performance integrated power management solutions. Key principles include maintaining low ground impedance through thick current-carrying traces, ground planes, and multiple vias. Sensitive signals must be shielded from noise, and power and ground planes should be placed under PMICs to minimize inductance. Specific layout guidelines address buck, boost converters, LDOs, and battery chargers. Examples from Dialog’s reference designs illustrate best practices. Design-in services are available to review schematics and layouts to enhance efficiency and reliability.
- Application NotePDF 388 KB Oct 08, 2020AI-generated Summary: The DA9061 and DA9062 PMICs provide flexible power management solutions tailored for the NXP i.MX 7Solo processor, ensuring stable and efficient operation. Key power rails such as VDD_SOC, VDD_ARM, and VDD_SNVS_IN are managed with precise voltage levels and sequencing to meet processor requirements. The DA9061 supports dynamic voltage control to optimize power consumption and system cost, while the DA9062 adds features like SNVS coin-cell charging and additional power rails. Power-up and power-down sequences, I2C interface control, and recommended external components are detailed. PCB design files bundled in zip downloads include BOM, schematic, and Gerber files for the DA9062 WaRP7 CPU Board and general DA9062 iMX7 design files.
- Application NotePDF 184 KB Apr 14, 2020AI-generated Summary: Unused pins on the DA9061 and DA9062 power management ICs require specific configurations to avoid operational issues. Digital inputs should be pulled up or tied to a non-active state, outputs left floating, and power pins connected as specified. For 2-wire interfaces, unused SDA and SCL pins must connect to ground. Voltage regulator and buck converter pins not in use should be grounded or left floating based on their function. Proper unused pin configuration ensures system stability and prevents unintended behavior in various applications.View More (13)
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Support Communities
-
DA9061/62/63 Motherboad no longer working
Hello, We're developing a product that is using the DA9061 PMIC and have been using the motherboard dev kit to test it. Recently it stopped working as I can no longer connect to blank chips using the DA9061 GUI software. If I place a blank chip in the socket ...
May 1, 2020 -
DA9061/2 Schematic Checklist
This checklist is intended to help a hardware designer identify common errors and to ensure correct and efficient operation of schematics containing either the DA9061 or DA9062 PMIC. Click here for the DA9061 Application notes. Click here for the DA9062 Application notes.
Nov 16, 2017 -
DA9061_2_3 ICP Kit
Hi, My customer has the following questions: 1- Is the ICP programmer you are offering (perhaps DA9061_2_3 ICP KIT) similar to 'Programmer Board' 232-18-A (shown below)? If yes, do you have a data sheet for this? There is no further information on the dialog page. 2 ...
Aug 28, 2017
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