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Features

  • Single voltage operation with range of 2.7V to 3.6V
  • Serial Peripheral Interface (SPI) compatible support
  • Read operations
    • Fast read up to 133MHz
    • Quad SPI and QPI read up to 133MHz
    • Continuous read with 8/16/32/64-byte wrap
  • Flexible erase architecture and time
    • Sector erase 4kB (70 ms typical)
    • Block erase 32kB and 64kB (150ms and 250ms typical)
    • Full chip erase (30s typical)
  • Flexible programming and time
    • Page/byte program (from 1 to 256 bytes)
    • Page program time (0.6ms, typical)
  • Erase program suspend resume
  • JEDEC Standard Manufacturer and Device ID
  • Multiple memory protection schemes
    • Top, bottom, sector, or block selection
    • Enable/Disable protection with WP pin
    • Write protect all portions of memory via software protect
  • 3 x 256-byte One-Time Programmable (OTP) security registers
  • Serial Flash Discoverable Parameter (SFDP) register
  • Low power dissipation
    • 13μA Standby current (typical)
    • 2μA Deep power-down current (typical)
    • 10mA active read current (typical)
  • User-configurable I/O pin drive strength levels
  • Endurance
    • 100K program/erase cycles at 85°C
    • 10K program/erase cycles at 105°C
  • Data Retention
    • 20 years at 85°C
    • 10 years at 105°C
  • Temperature Range
    • Industrial: -40°C to 85°C
    • Extended Temperature Range: -40°C to 105°C
  • Industry standard green (Pb/Halide-free/RoHS-compliant) package options
    • 8-pin (208mil) Wide Body SOIC
    • 8-pad (5mm x 6mm x 0.6mm) UDFN

Description

The AT25QF128A is a member of our standard class code and data storage solutions designed for 3V systems in which program code is shadowed from Flash memory into embedded or external RAM for execution.

The architecture includes erase block sizes optimized to meet the needs of today's code and data storage applications, and three security register pages for unique device serialization, system-level Electronic Serial Number (ESN) storage, locked key storage, etc.

  • Universally compatible pinout and command set
  • Standard block architecture
  • Supports Dual I/O, Quad I/O and XiP operation
  • Quad enabled at the factory
  • Continuous read, wrap, and burst modes for XiP

Parameters

Attributes Value
Memory Class Standard Flash
Memory Density 128 Mbit
Operating Voltage Range (V) -
Speed 133 MHz
Interface Quad SPI (default), Single, Dual
Temp. Range (°C) -40 to +85°C, -40 to +105°C
Deep Power Down (µA) 2
Read Current (mA) 12
Key Benefit Standard features

Package Options

Pkg. Type Pkg. Dimensions (mm) Pitch (mm)
SOIC-W 5.18 x 7.70 1.27
UDFN 5 x 6 1.27

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