The RZ/V series are microprocessors (MPUs) with a Dynamically Reconfigurable Processor (DRP)-AI, Renesas' original AI accelerator that achieves both high AI inference performance and low power consumption. The RZ/V2M has a high-performance image signal processor (ISP) that supports 4K/30fps, and the RZ/V2L has a 3D graphics engine and versatile peripheral functions for a wide range of applications.
AI Accelerator: DRP-AI
DRP-AI is Renesas' dedicated hardware that provides high performance and low power consumption, and the ability to respond to evolution.
White Paper: Embedded AI-Accelerator DRP-AI (PDF | English, 日本語)
Partner Solutions
Partner products and services that support the RZ/V series can speed up your design and get to market faster.
Document: RZ/V MPU AI Application Examples (PDF | English, 日本語)
Target Applications
- IP camera
- Surveillance camera
- Retail
- Logistics
- Image inspection
Featured Products
| Product | Description | Featured Document |
|---|---|---|
| RZ/V2L | General-Purpose Microprocessor Equipped With Renesas' Original AI-Dedicated Accelerator "DRP-AI", 1.2GHz Dual-Core Arm® Cortex®-A55 CPU, 3D Graphics, and Video Codec Engine |  |
| RZ/V2M | AI-only Accelerator (DRP-AI), 4K-compatible Image Signal Processor (ISP), Vision-AI ASSP for Real-time Human and Object Recognition | |
Specification Summary
| RZ/V2M | RZ/V2L | |
|---|---|---|
| Main CPU | Arm® Cortex®-A53 (1.0GHz) Dual | Arm Cortex-A55 (1.2GHz) Dual/Single |
| Sub CPU | --- | Arm Cortex-M33 (200MHz) Single |
| DRAM-I/F | LPDDR4-3200 32-bit | DDR3L/DDR4-1600 16-bit (In-line ECC) |
| ISP | 4K/30fps, HDR/3DNR, etc. | --- (*1) |
| Video CODEC | H.264/265 Enc/Dec (4K/30fps) | H.264 Enc/Dec (2K/30fps) |
| Graphics Engine | 2D GPU | Arm Mali-G31 3D GPU |
| Camera-I/F | 2x MIPI-CSI2 (4-lane) | 1x MIPI-CSI2 (4-lane), 1x Parallel |
| Display-I/F | 1x MIPI-DSI2 (4-lane), 1x HDMI | 1x MIPI-DSI2 (4-lane), 1x Parallel |
| Peripherals | 1x USB3.1, 1x GbEther, 1x PCIe Gen2 | 2x USB2.0, 2x GbEther, 2x CAN-FD |
| Package | 841-pin FCBGA (15x15mm, 0.5mm pitch) | 456-pin LFBGA (15x15mm, 0.5mm pitch) 551-pin LFBGA (21x21mm, 0.8mm pitch) |
(*1) Simple ISP function provided as DRP library
AI Development Tool Flow
- Open frameworks can be used for learning
- Converts from industry standard ONNX Format to executable with DRP-AI Translator
Use Case
select_allSoftware & Tool Pages
| Title | Type | Description | Company |
|---|---|---|---|
| DRP-AI Translator | Software Package | This is an AI model conversion tool (DRP-AI Translator) for DRP-AI equipped products. Please check the Release Notes and User's Manual first before using this product. | Renesas |
| RZ/V2L DRP-AI Support Package | Software Package | This product provides the software and documentation for DRP-AI embedded within RZ/V2L. Please read the release note included in this first when you use this product. | Renesas |
| RZ/V2L Linux Package | Software Package | This product provides Linux Package for RZ/V2L 64-bit processors. Please read the Release Note included in this first when you use the package. | Renesas |
| RZ/V2M DRP-AI Support Package | Software Package | This product provides the software and documentation for DRP-AI embedded within RZ/V2M. | Renesas |
| RZ/V2M Linux Package | Software Package | This product provides Linux Package for RZ/V2M 64-bit processors. Please read the Release Note included in this first when you use the package. | Renesas |
