One of Xilinx’s newest SoC families is the Versal Adaptive Compute Acceleration Platform (ACAP). It contains scalar processing engines, adaptable hardware, intelligent engines (SW programmable and HW adaptable), and Network-On-Chip, a SW programmable infrastructure. This requires precise, adaptable timing and power.

This winning combination highlights the timing solution that Xilinx used on their reference design and the suggested power devices.

Visit the Versal ACAP page to learn more.

Key Features

  • Digital multiphase power to deliver up to 165A at 0.78V to meet the strict specs set forth by Xilinx
  • Pre-programmed PMICs help meet any use case required
  • FemtoClock®NG Universal Translator capable of supporting 10G/40G/100G SONET/SDH and Ethernet networks
  • Added a system synchronizer for IEEE 1588
System Block Diagram

Winning Combinations

Renesas and IDT’s complementary product portfolios work together to deliver comprehensive solutions to our customers. This is just the beginning, with the combination of the Renesas and IDT development teams, there will more integrated solutions that provide significant advantages over traditional solutions.

See the benefits immediately with our “Winning Combinations” solutions