Features
- Universally compatible pin out and command set
- Low Sleep power for bootloader tasks
- Continuous read, wrap and burst modes for XiP
- Includes a controllable R/W SRAM buffer for maximum flexibility
- Read-Modify-Write and Active Interrupt features reduce MCU overhead
- Standard block architecture with added 256-byte page erase for energy efficient Data Logging
- Eliminate MCU poling and reduce overhead with auto-alert Active Interrupt
Description
The AT25XE041D is a member of our System Enhancing class of code and data storage solutions designed for all system memory tasks ranging from boot/code shadowing to data logging of frequently changing data. It is universally compatible and includes extra features that save system energy and overhead.
Parameters
| Attributes | Value |
|---|---|
| Memory Class | FusionHD |
| Memory Density | 4 |
| Operating Voltage Range (V) | 1.65 - 3.6 |
| Speed | 133 MHz |
| Interface | Single, Dual, Quad SPI |
| Temp. Range (°C) | -40 to +85°C |
| Deep Power Down (µA) | 0.007 |
| Read Current (mA) | 5.6 |
| Key Benefit | 70% energy savings |
Application Block Diagrams
| Bluetooth Low Energy Tags for Proximity and Asset Tracking Ultra-low power Bluetooth Low Energy asset tracker tag with high-precision accuracy. |
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| Part Number | Status | Longevity | Stock | Package | Budgetary Price (USD) | Sample Catalog | Carrier Type | Moisture Sensitivity Level (MSL) | Country of Assembly | Country of Wafer Fabrication |
|---|---|---|---|---|---|---|---|---|---|---|
| AT25XE041D-DWF | Active | 2030 Jan | Out of Stock | DWF | <a href="https://www.renesas.com/samplecomponents/scripts/samplecenter/adestotech?cmd=menu" title="Request Samples" rel="noreferrer">Request Samples</a> | 1 | ||||
| AT25XE041D-MAHN-T | Active | 2030 Jan | In Stock | DFN | 1ku | $0.36 | <a href="https://www.renesas.com/samplecomponents/scripts/samplecenter/adestotech?cmd=menu" title="Request Samples" rel="noreferrer">Request Samples</a> | Tape & Reel | 1 | TAIWAN | CHINA |
| AT25XE041D-SHN-B | Active | 2030 Jan | Out of Stock | SOIC-W | 1ku | $0.34 | <a href="https://www.renesas.com/samplecomponents/scripts/samplecenter/adestotech?cmd=menu" title="Request Samples" rel="noreferrer">Request Samples</a> | Tube | 1 | TAIWAN | CHINA |
| AT25XE041D-SHN-T | Active | 2030 Jan | In Stock | SOIC-W | 1ku | $0.32 | <a href="https://www.renesas.com/samplecomponents/scripts/samplecenter/adestotech?cmd=menu" title="Request Samples" rel="noreferrer">Request Samples</a> | Tape & Reel | 1 | TAIWAN | CHINA |
| AT25XE041D-SSHN-B | Active | 2030 Jan | In Stock | SOIC-N | 1ku | $0.29 | <a href="https://www.renesas.com/samplecomponents/scripts/samplecenter/adestotech?cmd=menu" title="Request Samples" rel="noreferrer">Request Samples</a> | Tube | 1 | PHILIPPINES | CHINA |
| AT25XE041D-SSHN-T | Active | 2030 Jan | In Stock | SOIC-N | 1ku | $0.29 | <a href="https://www.renesas.com/samplecomponents/scripts/samplecenter/adestotech?cmd=menu" title="Request Samples" rel="noreferrer">Request Samples</a> | Tape & Reel | 1 | PHILIPPINES | CHINA |
| AT25XE041D-UUN-T | Active | 2030 Jan | In Stock | WLCSP | 1ku | $0.35 | <a href="https://www.renesas.com/samplecomponents/scripts/samplecenter/adestotech?cmd=menu" title="Request Samples" rel="noreferrer">Request Samples</a> | Tape & Reel | 1 | PHILIPPINES | CHINA |
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Filters
Applied Filters
- Application NotePDF 884 KB R10AN0038EU0100 Rev.1.00 Mar 10, 2026This application note discusses endurance and data retention in NOR Flash memory products. It describes the structure and operation of the NOR Flash transistor, the mechanisms of NOR Flash device failure and oxide degradation which limit endurance and data retention. It explains JEDEC-based test procedures for certifying endurance and data retention specifications and ways to mitigate limitations. The first part of this document and the appendix provide background for understanding the issue. The later sections describe practical scenarios of interest to most customers.
- Application NotePDF 695 KB AN503 Sep 05, 2025Explores thermal resistance in integrated circuits (ICs) and details its role in managing heat from power consumption to ensure reliable operation. Proper thermal management enhances IC performance and longevity. Thermal resistance, measured in °C/W, quantifies heat flow resistance from the silicon die to the environment or PCB, with key types including junction-to-case (θJC), case-to-ambient (θCA), junction-to-ambient (θJA), and junction-to-board (θJB).
- Product AdvisoryPDF 150 KB Aug 20, 2025
- DatasheetAT25XE041D DatasheetRECOMMENDEDPDF 2.09 MB DS-AT25XE041D-084 Aug 12, 2025Describes the features, functions, command set, performance parameters, package pinout, package details, and the ordering number of the AT25XE041D. All the information in this document is to aid engineers to use the 4Mbit 1.65V to 3.6V, SPI serial NOR flash in their design.
- Application NotePDF 2.62 MB AN500 Feb 13, 2024AI-generated Summary: NOR Flash memory requires an erase operation before programming, which occurs in three phases: Pre-Program, Erase, and Recovery. The erase process affects entire blocks simultaneously, not byte-by-byte. Memory cells use floating gate MOSFETs to store data, organized into arrays of rows (Word-Lines) and columns (Bit-Lines). Physical Blocks contain multiple Logical Blocks and share common p-wells and Bit-Lines, impacting operation. Smaller Logical Blocks enable improved erase performance through parallelization. Understanding these processes and potential interruptions is crucial for designing reliable systems.
- Application NotePDF 710 KB AN502 Jan 24, 2024AI-generated Summary: Renesas NOR flash devices require decoupling capacitors close to VCC and GND pins to stabilize voltage, typically 1 μF with an optional 100 nF capacitor. Pull-up resistors are recommended on CS#, WP#/IO2, and HOLD#/IO3 pins to ensure proper signal states and facilitate debugging. Signal routing should minimize trace length and maintain a solid ground plane for high-speed signals. Power supply must rise monotonically during power-up. Basic system bring-up involves verifying installation, voltage levels, and SPI communication using manufacturer/device ID commands. Software drivers depend on host MCU architecture; Renesas offers example drivers and support. Correct erase/program sequences include write-enable, erase/program commands, and status checks. Tools for programming include flash loader plug-ins and debug probes. Switching from single to quad-SPI involves setting the quad-enable bit, changing pin functions. Dummy cycles introduce necessary wait times during read commands to accommodate latency.
- GuidePDF 790 KB SPI_NOR_Flash_Product_Guide_PBFLASH03102022rev-C Jun 16, 2023
- Product Change NoticePDF 195 KB Mar 06, 2023
- DocumentPDF 1 MB R10DS0315EU0000 Rev.0.00 Jun 28, 2022
- Application NotePDF 794 KB May 12, 2022AI-generated Summary: Renesas NOR flash devices implement multiple protection methods to safeguard memory arrays, status registers, flash states, and resets from accidental or intentional modifications. Protection types include hardware-based write protection via the WP pin and software-based protection through commands controlling status registers and memory blocks. Memory array protection schemes include individual block protection, allowing sector-level lock/unlock, and memory edge protection, which protects contiguous regions aligned to memory edges. Status register protection indirectly secures memory by blocking changes to protection states. Detailed command sets and register bits configure these protections, ensuring robust flash memory integrity.
- Model - Verilog
- Application NotePDF 663 KB Oct 18, 2021AI-generated Summary: Proper power-up and power-down sequencing is critical for NOR Flash memory operation to ensure reliable system performance. The power supply voltage must ramp up monotonically without dips, reaching the minimum operational voltage within specified timing to avoid corrupted initialization. Reset methods, including hardware and JEDEC resets, help ensure the device starts from a known state. Brown-out conditions and power cycling require careful handling to prevent data corruption and ensure stable operation. The document covers power sequencing, reset types, brown-out recovery, power-down, and power-saving modes, providing essential guidelines for system engineers and application developers.
- Model - IBIS
- DatasheetAT25XE041D DatasheetRECOMMENDEDPDF 2.09 MB DS-AT25XE041D-084 Aug 12, 2025Describes the features, functions, command set, performance parameters, package pinout, package details, and the ordering number of the AT25XE041D. All the information in this document is to aid engineers to use the 4Mbit 1.65V to 3.6V, SPI serial NOR flash in their design.
Recommended Documents (1)
- DatasheetAT25XE041D DatasheetRECOMMENDEDPDF 2.09 MB DS-AT25XE041D-084 Aug 12, 2025Describes the features, functions, command set, performance parameters, package pinout, package details, and the ordering number of the AT25XE041D. All the information in this document is to aid engineers to use the 4Mbit 1.65V to 3.6V, SPI serial NOR flash in their design.
Datasheets (1)
- GuidePDF 790 KB SPI_NOR_Flash_Product_Guide_PBFLASH03102022rev-C Jun 16, 2023
Manuals & Guides (2)
- Application NotePDF 884 KB R10AN0038EU0100 Rev.1.00 Mar 10, 2026This application note discusses endurance and data retention in NOR Flash memory products. It describes the structure and operation of the NOR Flash transistor, the mechanisms of NOR Flash device failure and oxide degradation which limit endurance and data retention. It explains JEDEC-based test procedures for certifying endurance and data retention specifications and ways to mitigate limitations. The first part of this document and the appendix provide background for understanding the issue. The later sections describe practical scenarios of interest to most customers.
- Application NotePDF 695 KB AN503 Sep 05, 2025Explores thermal resistance in integrated circuits (ICs) and details its role in managing heat from power consumption to ensure reliable operation. Proper thermal management enhances IC performance and longevity. Thermal resistance, measured in °C/W, quantifies heat flow resistance from the silicon die to the environment or PCB, with key types including junction-to-case (θJC), case-to-ambient (θCA), junction-to-ambient (θJA), and junction-to-board (θJB).
- Application NotePDF 2.62 MB AN500 Feb 13, 2024AI-generated Summary: NOR Flash memory requires an erase operation before programming, which occurs in three phases: Pre-Program, Erase, and Recovery. The erase process affects entire blocks simultaneously, not byte-by-byte. Memory cells use floating gate MOSFETs to store data, organized into arrays of rows (Word-Lines) and columns (Bit-Lines). Physical Blocks contain multiple Logical Blocks and share common p-wells and Bit-Lines, impacting operation. Smaller Logical Blocks enable improved erase performance through parallelization. Understanding these processes and potential interruptions is crucial for designing reliable systems.
- Application NotePDF 710 KB AN502 Jan 24, 2024AI-generated Summary: Renesas NOR flash devices require decoupling capacitors close to VCC and GND pins to stabilize voltage, typically 1 μF with an optional 100 nF capacitor. Pull-up resistors are recommended on CS#, WP#/IO2, and HOLD#/IO3 pins to ensure proper signal states and facilitate debugging. Signal routing should minimize trace length and maintain a solid ground plane for high-speed signals. Power supply must rise monotonically during power-up. Basic system bring-up involves verifying installation, voltage levels, and SPI communication using manufacturer/device ID commands. Software drivers depend on host MCU architecture; Renesas offers example drivers and support. Correct erase/program sequences include write-enable, erase/program commands, and status checks. Tools for programming include flash loader plug-ins and debug probes. Switching from single to quad-SPI involves setting the quad-enable bit, changing pin functions. Dummy cycles introduce necessary wait times during read commands to accommodate latency.
Application Notes & White Papers (9)
- Product AdvisoryPDF 150 KB Aug 20, 2025
- Product Change NoticePDF 195 KB Mar 06, 2023
- Product Change NoticePDF 528 KB Jun 26, 2020
Product Notices (PCN, EOL, etc) (4)
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- DocumentPDF 1 MB R10DS0315EU0000 Rev.0.00 Jun 28, 2022
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- Model - Verilog
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- Development ToolµISP is a compact standalone and universal solution, specifically designed for production environments, based on Algocrafts WriteNow! Technology. This is a standard tool for many families and devices and supports multi programming protocol (JTAG, SPI, UART, DAP, SWD, I2C, BDM, custom protocol, etc).Provided By: Algocraft Srl
- Development ToolWriteNow! Series of In-System Programmers is a breakthrough in the programming industry. The programmers support a large number of devices (microcontrollers, memories, CPLDs and other programmable devices) from various manufacturers and have a compact size for easy ATE/fixture integration. They work in standalone or connected to a ...Provided By: Algocraft Srl
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- Model - Verilog
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Simulation Models (2)
- Development ToolµISP is a compact standalone and universal solution, specifically designed for production environments, based on Algocrafts WriteNow! Technology. This is a standard tool for many families and devices and supports multi programming protocol (JTAG, SPI, UART, DAP, SWD, I2C, BDM, custom protocol, etc).Provided By: Algocraft Srl
- Development ToolWriteNow! Series of In-System Programmers is a breakthrough in the programming industry. The programmers support a large number of devices (microcontrollers, memories, CPLDs and other programmable devices) from various manufacturers and have a compact size for easy ATE/fixture integration. They work in standalone or connected to a ...Provided By: Algocraft Srl
Partner Solutions (2)
Support Communities
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DA14531 (WLCSP17) Cannot flash external SPI (or read OTP) - Failed clearing memory address 7FC3C08. Failed configuring SPI ports and pins.QuestionContext
Question How can we let SmartSnippets Toolbox turn off HW_RESET, or otherwise customize the jtag_programmer.bin ? Context We have been able to run our firmware (based on the ble_app_example, for SDK version: 6.0.14.1114) using Keil - so we know we can program the RAM ...
Mar 21, 2023 -
Unclear datasheet AT25XV041B
Dear Support, I would be very happy if you could answer the following 3 questions as we would like to start with a 0-series production. 1) Is the AT25XV041B soon going to be marked end of life / not recommended for future development? 2) On page 46, the AT25XV041B ...
Feb 18, 2022 -
DA14531 - Writing & Reading Flash-Data
Hello, I am coding based on the ble_app_peripheral example from SDK6.0.16.1144 trying to write and read data from flash. For example I have a char with the value "00000" and would like to write into flash. I also would like to read the value of ...
Mar 21, 2023