Features
- LP-HCSL outputs eliminate up to 16 termination resistors.
- PCIe Gen 1–7 compliance
- 2:4 or two 1:2 multiplexer options
- Drive both source-terminated and double-terminated loads selectable 85Ω and 100Ω output impedance
- Open-drain LOS (Loss-Of-Signal) indication output
- Power down tolerance (PDT)
- Flexible startup sequencing (FSS)
- Automatic clock parking (ACP)
- Dedicated OE# pins to control group output
- 4mm × 4mm 28-VFQFPN package
Description
The RC19204 is a 2:4 PCIe Gen7 multiplexer that is backward compatible with earlier PCIe generations. The RC19204 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design.
Application Block Diagrams
 | AMD 4th-Gen EPYC (Genoa) Power & Timing System Complete power and timing system for AMD Genoa with SVI3, DDR5, and PCIe Gen 5/6 support. |