Clocks & Timing

Overview

The 9FGV0441 is an 4-output very low power clock generator for PCIe Gen1–4 applications with integrated output terminations providing Zo = 100Ω. The device has 4 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off.

9FGV0441 - Block Diagram
9FGV0441 - Block Diagram
  • Integrated terminations provide 100Ω differential Zo; reduced component count and board space
  • 1.8V operation; reduced power consumption
  • OE# pins; support DIF power management
  • LP-HCSL differential clock outputs; reduced power and board space
  • Programmable slew rate for each output; allows tuning for various line lengths
  • Programmable output amplitude; allows tuning for various application environments
  • DIF outputs blocked until PLL is locked; clean system start-up
  • Selectable 0%, -0.25% or -0.5% spread on DIF outputs; reduces EMI
  • External 25MHz crystal; supports tight ppm with 0 ppm synthesis error
  • Configuration can be accomplished with strapping pins; SMBus interface not required for device control
  • 3.3V tolerant SMBus interface works with legacy controllers
  • Space saving 5 x 5 mm 32-VFQFPN; minimal board space
  • Selectable SMBus addresses; multiple devices can easily share an SMBus segment
System on Module (SoM) Solution with RZ/G2E
Voice/Face Recognition for Security Systems

Documentation

Title Type Date
9FGV0441 Datasheet
PDF580 KB
Datasheet
AN-805 Recommended Ferrite Beads
PDF91 KB
Application Note
AN-827 Application Relevance of Clock Jitter
PDF1.99 MB
Application Note
AN-975 Cascading PLLs
PDF255 KB
Application Note
AN-918 Programmable Clocks vs Crystal Oscillators
PDF307 KB
Application Note
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT Universal Low-Power HCSL Outputs
PDF480 KB
Application Note
AN-879 Low-Power HCSL vs Traditional HCSL
PDF235 KB
Application Note
AN-843 PCI Express Reference Clock Requirements
PDF1.90 MB
Application Note
AN-842 Thermal Considerations in Package Design and Selection
PDF495 KB
Application Note
AN-840 Jitter Specifications for Timing Signals
PDF442 KB
Application Note
AN-839 RMS Phase Jitter
PDF233 KB
Application Note
AN-835 Differential Input with VCMR being VIH Referenced
PDF160 KB
Application Note
AN-836 Differential Input to Accept Single-ended Levels
PDF120 KB
Application Note
AN-815 Understanding Jitter Units
PDF565 KB
Application Note
AN-802 Crystal-Measuring Oscillator Negative Resistance
PDF136 KB
Application Note
Timing Products for NXP (Freescale) i.MX
PDF321 KB 简体中文
Guide
PCI Express Timing Solutions Overview
PDF2.40 MB
Overview
IDT Clock Generation Overview
PDF1.83 MB
Overview
PCN# : 220015 (R1) Add Alternate Assembly Location on VFQFPN Packages
PDF734 KB
Product Change Notice
PCN# : 220015 Add Alternate Assembly Location on VFQFPN Packages
PDF728 KB
Product Change Notice
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility
PDF983 KB
Product Change Notice
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location
PDF583 KB
Product Change Notice
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location
PDF596 KB
Product Change Notice
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location
PDF544 KB
Product Change Notice

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

Explore ECAD Models

Models

Title Type Date
9FGV0441 IBIS Model
ZIP97 KB
Model - IBIS

Product Options

    Processing table
    Part Number
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Buy / Sample
    9FGV0441AKILF
    play_circleActive
    memory
    view_in_ar
    Samples Available
    		 VFQFPN 32 I Yes Tray Get Samples,
    9FGV0441AKILFT
    play_circleActive
    memory
    view_in_ar
    		VFQFPN 32 I Yes Reel
    9FGV0441AKLF
    play_circleActive
    memory
    view_in_ar
    Samples Available
    		 VFQFPN 32 C Yes Tray Get Samples,
    9FGV0441AKLFT
    play_circleActive
    memory
    view_in_ar
    		VFQFPN 32 C Yes Reel
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    • Cart icon to the right of the chip icon: Indicates that samples are available for this product

    Support

    Contact Technical SupportGet SamplesClocks & Timing FAQsClocks & Timing ForumContact a Sales Representative

    Videos & Training

    PCIe Reference Clock Jitter Budgets

    IDT’s chief PCIe system architect explains the fundamental difference in reference clock jitter budgets between the first three generations of the specification and those of Gen4 and Gen5 which raise new challenges for designers.

    Video List

    News & Blog Posts

    IDT Announces World’s Lowest-power PCI Express Timing Family News