RFコンバータクロック

位相ノイズとスプリアスを極めて小さく抑えたジッター減衰器／周波数生成器です。1種または複数種のRFクロック周波数をサポートします。入力クロックの冗長化や、中～高レベルのクロックファンアウト、JESD204B規格に対応する同期信号（オプション）をサポートしています。

ニュース&各種リソース

	分類	日付昇順で並び替え
An Insider’s Guide to Finding the Right Timing Device for Your System	ブログ	2017年12月18日
Why Fanout Buffers Make More Sense	ブログ	2017年11月28日
Time for Performance	ブログ	2017年10月11日

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	Outputs (#)	Inputs (#)	Input Freq (MHz)	JESD204B/C Compliant	Output Freq Range (MHz)	Frequency Plan	Output Skew (ps)	Adjustable Phase	Noise Floor (dBc/Hz)	Phase Noise Supports GSM	Output Type	Synthesis Mode	Input Ref. Divider Resolution (bits)	Feedback Divider Resolution (bits)	Output Divider Resolution (bits)	Supply Voltage (V)	Input Redundancy	Advanced Features	Pkg. Type	Lead Count (#)
8V19N470 SMP IMG PDF FemtoClock® NG Jitter Attenuator and Clock Synthesizer	10	2	0.008 - 307.2	No	15.36 - 2949.12	2457.6 / Output_Divider, 2500 / Output_Divider, 2949.12 / Output_Divider	41	Yes	-161	Yes	LVDS, LVPECL	Integer	15	15	8	3.3	Auto-switch, Holdover, Input Monitor, Manual switch and more...	Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock	CABGA	81
8V19N472 SMP IMG PDF FemtoClock® NG Jitter Attenuator and Clock Synthesizer	11	2	0.008 - 307.2	No	15.36 - 2949.12	2457.6 / Output_Divider, 2500 / Output_Divider, 2949.12 / Output_Divider	28	Yes	-158.7	Yes	LVDS, LVPECL	Integer	15	15	8	3.3	Auto-switch, Holdover, Input Monitor, Manual switch and more...	Holdover, Input Switching, Phase Delay, Programmable Clock	CABGA	81
8V19N474 SMP IMG PDF FemtoClock® NG Jitter Attenuator and Clock Synthesizer	12	2	0.008 - 250	No	15.625 - 2500	2400 / Output_Divider, 2500 / Output_Divider	70	Yes	-161	Yes	LVDS, LVPECL	Fractional, Integer	15	15	8	3.3	Auto-switch, Input Monitor, Manual switch	Holdover, Input Switching, Phase Delay	CABGA	81
8V19N480 SMP IMG PDF FemtoClock® NG Jitter Attenuator and Clock Synthesizer	18	4	30.72 - 500	Yes	20.48 - 1474.56	2949.12 / Output_Divider	37	Yes	-161	Yes	LVDS, LVPECL	Integer	12	12	8	3.3	Auto-switch, Holdover, Input Monitor, Manual switch and more...	Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock	CABGA	100
8V19N490 SMP IMG PDF FemtoClock® NG Jitter Attenuator and Clock Synthesizer	18	4	1.92 - 2000	Yes	18.432 - 2949.12	2949.12 / Output_Divider	100	Yes	-160	Yes	LVDS, LVPECL	Integer	12	12	8	3.3	Auto-switch, Holdover, Input Monitor, Manual switch and more...	Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock	CABGA	100
8V19N490-19 SMP IMG PDF FemtoClock® NG Jitter Attenuator and Clock Synthesizer	18	4	1.92 - 2000	Yes	12.288 - 1966.08	1966.08 / Output_Divider	100	Yes	-160	Yes	LVDS, LVPECL	Integer	12	12	8	3.3	Auto-switch, Holdover, Input Monitor, Manual switch and more...	Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock	CABGA	100
8V19N490-24 SMP IMG PDF FemtoClock® NG Jitter Attenuator and Clock Synthesizer	18	4	1.92 - 2000	Yes	15.36 - 2457.6	2457.6 / Output_Divider	100	Yes	-160	Yes	LVDS, LVPECL	Integer	12	12	8	3.3	Auto-switch, Holdover, Input Monitor, Manual switch and more...	Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock	CABGA	100
8V19N490A SMP IMG PDF FemtoClock® NG Jitter Attenuator and Clock Synthesizer	18	4	1.92 - 2000	Yes	18.432 - 2949.12	2949.12 / Output_Divider	100	Yes	-160	Yes	LVDS, LVPECL	Integer	12	12	8	3.3	Auto-switch, Holdover, Input Monitor, Manual switch and more...	Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock	CABGA	100
8V19N491-24 SMP IMG PDF FemtoClock® NG Jitter Attenuator and Clock Synthesizer	15	2	1.92 - 2000	Yes	12.288 - 2457.6	2457.6 / Output_Divider	100	Yes	-160	Yes	LVDS, LVPECL	Integer	12	12	8	3.3	Auto-switch, Holdover, Input Monitor, Manual switch and more...	Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock	VFQFPN	88
8V19N491-36 SMP IMG PDF FemtoClock® NG Jitter Attenuator and Clock Synthesizer	18	4	30.72 - 2000	Yes	18.432 - 3686.4	3686.4 / Output_Divider	100	Yes	-160	Yes	LVDS, LVPECL	Integer	12	12	8	3.3	Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock	Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock	CABGA	100
8V19N492 SMP IMG PDF FemtoClock® NG Jitter Attenuator and Clock Synthesizer	15	2	1.92 - 2000	Yes	18.432 - 2949.12	2949.12 / Output_Divider	0	Yes	-160	Yes	LVDS, LVPECL	Integer	12	12	8	3.3	Auto-switch, Holdover, Input Monitor, Manual switch and more...	Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock	VFQFPN	88
8V19N492-39 SMP IMG PDF FemtoClock® NG Jitter Attenuator and Clock Synthesizer	15	2	30.72 - 2000	Yes	19.6608 - 3932.16	3932.16 / Output_Divider	100	Yes	-160.2	Yes	LVDS, LVPECL	Integer	12	12	8	3.3	Auto-switch, Holdover, Input Monitor, Manual switch and more...	Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock	VFQFPN	88
8V19N880 SMP IMG PDF RF Sampling Clock Generator and Jitter Attenuator	18	4	0.00375 - 2000	Yes	0.192 - 6000	3932.16 / Output_Divider	100	Yes	-160	Yes	LVDS, LVPECL	Integer	15	15	7	1.8, 3.3	Auto-switch, Holdover, Input Monitor, Manual input switch	Holdover, Input Switching, JESD204B, JESD204C	CABGA	100
8V19N882 SMP IMG PDF RF Sampling Clock Generator and Jitter Attenuator	16	2	0.00375 - 2000	Yes	0.192 - 6000	3932.16 / Output_Divider	100	Yes	-160	Yes	LVDS, LVPECL	Integer	15	15	7	1.8, 2.5, 3.3	Auto-switch, Holdover, Input Monitor, Manual input switch	External VCO, Holdover, Input Switching, JESD204B, JESD204C	VFQFPN	76