Features
- Frequency range: 15MHz to 2100MHz
- Output types: CML, LVDS, LVPECL, HCSL
- Phase jitter (12kHz to 20MHz): 120fs typical
- Supply voltage: 1.8V, 2.5V, or 3.3V
- Package options:
- 3.2mm × 2.5mm × 1.0mm
- 5.0mm × 3.2mm × 1.2mm
- 7.0mm × 5.0mm × 1.8mm
- Frequency stability: ± 25ppm
- Operating temperatures: -40 °C to +85 °C
- Frequency stability: ± 50ppm
- Operating temperatures: -40 °C to +105 °C
Description
The XP is a quartz-based PLL clock oscillator family with <150fs phase jitter. It is ideal for enterprise-level equipment that demand very low noise, stable, and accurate timing/clock sources. The XP quartz-based PLL oscillator's key focus is on noise reduction technologies. Typical phase jitter is 120fs over 12kHz to 20MHz bandwidth. The devices are available in a wide frequency range from 15MHz to 2100MHz.
Short lead time, low noise, wide frequency range, excellent ambient performance, and very little engineering effort to incorporate this into your design make the XP family an excellent choice over conventional technologies. The XP family has stabilities as tight as ±25ppm for -40 °C to +85 °C and ±50ppm for -40 °C to +105 °C. This XP family provides extremely quick delivery for both standard and custom frequencies.
Try the Custom Part Configuration Utility.
Parameters
| Attributes | Value |
|---|---|
| Function | XO |
| Output Type | CML, LVDS, LVPECL, HCSL, LVDS, HCSL, LVPECL, LVDS, CML, HCSL |
| Output Freq Range (MHz) | 15 - 2100 |
| Supply Voltage (V) | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 |
| Phase Jitter Max RMS (ps) | 0.15 |
| Freq. Stability Total (± PPM) | 25, 50 |
| Temp. Range (°C) | -40 to +105°C, -40 to 85°C |
| Product Category | Crystal Oscillators |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| — | 5.0 × 3.2 × 1.2 | — | — |
| — | 3.2 × 2.5 × 1.0 | — | — |
| CLCC | 7.0 x 5.0 x 1.7 | 8 | 2.54 |
Try the Custom Part Configuration Utility.
| Part Number | Status | Samples | Longevity | Stock | Package | Budgetary Price (USD) | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Output Type | Output Freq (MHz) | Pkg. Dimensions (mm) | Freq. Stability Total (± PPM) | Pitch (mm) | Reel Size (in) | Supply Voltage (V) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) | Country of Assembly | Country of Wafer Fabrication |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| XPC736156.250000I | Active | Available | 2040 Apr | In Stock | CLCC | 1ku | $5.49 | 8# | Reel | 1 | CML, LVDS, LVPECL, HCSL | 156.25MHz | 7.0 x 5.0 x 1.7 | 25± PPM | 2.54mm | 7in | 3.3 - 3.3 | Yes | e4 Au | -40 to 85°C | TAIWAN | TAIWAN |
| XPP736156.250000I | Active | Available | 2040 Apr | In Stock | CLCC | 1ku | $5.49 | 8# | Reel | 1 | LVPECL, LVDS, CML, HCSL | 156.25MHz | 7.0 x 5.0 x 1.7 | 25± PPM | 2.54mm | 7in | 3.3 - 3.3 | Yes | e4 Au | -40 to 85°C | TAIWAN | TAIWAN |
| XPP736312.500000I | Active | Available | 2040 Apr | In Stock | CLCC | 1ku | $5.49 | 8# | Reel | 1 | LVPECL, LVDS, CML, HCSL | 312.5MHz | 7.0 x 5.0 x 1.7 | 25± PPM | 2.54mm | 7in | 3.3 - 3.3 | Yes | e4 Au | -40 to 85°C | TAIWAN | TAIWAN |
| XPP736625.000000I | Active | Available | 2040 Apr | Out of Stock | CLCC | 1ku | $5.49 | 8# | Reel | 1 | LVPECL, LVDS, CML, HCSL | 625MHz | 7.0 x 5.0 x 1.7 | 25± PPM | 2.54mm | 7in | 3.3 - 3.3 | Yes | e4 Au | -40 to 85°C | TAIWAN | TAIWAN |
| XPxxxxxxx.xxxxxxx1 | Preview | N/A | 2040 Apr | Out of Stock | Package | LVDS, HCSL | 5.0 × 3.2 × 1.2 | 50± PPM | 1.8 - 1.8, 2.5 - 2.5 | -40 to +105°C | |||||||||||
| XPxxxxxxx.xxxxxxx2 | Preview | N/A | 2040 Apr | Out of Stock | Package | LVDS, HCSL | 3.2 × 2.5 × 1.0 | 50± PPM | 1.8 - 1.8, 2.5 - 2.5 | -40 to +105°C | |||||||||||
| XPL536800.000000I | Last Time Buy | N/A | 2040 Apr | Out of Stock | CLCC | 1ku | $5.49 | 8# | Reel | 1 | LVDS | 800MHz | 5.0 x 3.2 x 1.1 | 25± PPM | 1.27mm | 13in | 3.3 - 3.3 | Yes | e4 Au | -40 to 85°C | TAIWAN | TAIWAN |
| XPP536156.250000I | Last Time Buy | N/A | 2040 Apr | Out of Stock | CLCC | 1ku | $5.49 | 8# | Reel | 1 | LVPECL | 156.25MHz | 5.0 x 3.2 x 1.1 | 25± PPM | 1.27mm | 13in | 3.3 - 3.3 | Yes | e4 Au | -40 to 85°C | TAIWAN | TAIWAN |
| XPP536312.500000I | Last Time Buy | N/A | 2040 Apr | Out of Stock | CLCC | 1ku | $5.49 | 8# | Reel | 1 | LVPECL | 312.5MHz | 5.0 x 3.2 x 1.1 | 25± PPM | 1.27mm | 13in | 3.3 - 3.3 | Yes | e4 Au | -40 to 85°C | TAIWAN | TAIWAN |
| XPP536625.000000I | Last Time Buy | N/A | 2040 Apr | Out of Stock | CLCC | 1ku | $5.49 | 8# | Reel | 1 | LVPECL | 625MHz | 5.0 x 3.2 x 1.1 | 25± PPM | 1.27mm | 13in | 3.3 - 3.3 | Yes | e4 Au | -40 to 85°C | TAIWAN | TAIWAN |
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- Application NotePDF 1.53 MB R31AN0034EU0102 Rev.1.02 Oct 21, 2025AI-generated Summary: PLL loop filter design involves selecting component values to ensure stable operation and optimized phase noise. The loop bandwidth depends on parameters like charge pump current, VCO gain, and feedback divider. Second and third order passive loop filters are common, with specific calculations for cutoff, zero, and pole frequencies guiding component selection. Proper tuning of loop bandwidth enhances PLL stability and phase noise performance, demonstrated through lab experiments and calculation examples.
- GuidePDF 436 KB R31AN0001EU0102 Rev.1.02 Mar 24, 2025
- GuidePDF 7.95 MB 7WDXRDKU4E7E-5-61625 Sep 27, 2022
- Product Change NoticePDF 113 KB Mar 10, 2022
- Product Change NoticePDF 105 KB Jul 02, 2020
Recommended Documents (1)
Datasheets (9)
- GuidePDF 436 KB R31AN0001EU0102 Rev.1.02 Mar 24, 2025
- GuidePDF 7.95 MB 7WDXRDKU4E7E-5-61625 Sep 27, 2022
- GuideXLS 3.38 MB 7WDXRDKU4E7E-5-61626 May 04, 2017
Manuals & Guides (4)
- Application NotePDF 1.53 MB R31AN0034EU0102 Rev.1.02 Oct 21, 2025AI-generated Summary: PLL loop filter design involves selecting component values to ensure stable operation and optimized phase noise. The loop bandwidth depends on parameters like charge pump current, VCO gain, and feedback divider. Second and third order passive loop filters are common, with specific calculations for cutoff, zero, and pole frequencies guiding component selection. Proper tuning of loop bandwidth enhances PLL stability and phase noise performance, demonstrated through lab experiments and calculation examples.
Application Notes & White Papers (1)
- Product Change NoticePDF 113 KB Mar 10, 2022
- Product Change NoticePDF 105 KB Jul 02, 2020
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- OverviewPDF 525 KB R31DS0080EU0100 Rev.1.00 Oct 03, 2023
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Renesas Boards & Kits
Evaluation Board for XP Family Quartz-based PLL Oscillators
This is the evaluation board for the XP family field adjustable oscillator. With RMS phase jitter of less than 150fs over the full 12kHz to 20MHz integration range, the device meets the stringent jitter requirements 100G and 400G applications.
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- Solution ToolkitThis powerful, cloud-based tool gives you 24/7 access to live phase noise measurements for Renesas’ flagship clock families, including VersaClock®, FemtoClock™, and ProXO.
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The XF and XP family of field-programmable clock oscillators (XOs) are optimized for use data centers, optical and wireline communication network, and industrial level equipment that demands very low noise, stable, and accurate timing/clock sources. These devices are single-output clock oscillators with an integrated resonator that utilizes a proprietary ASIC with a key focus on reduction in phase noise and phase jitter. Typical phase jitter is 120fs over 12kHz to 20MHz bandwidth. These chips are available in a wide frequency range from 15MHz to 2100MHz.
A brief overview of the features and benefits of IDT's (acquired by Renesas) ProXO family clock oscillators. These clock oscillators offer designers a reliable on-time, timing solution. Short lead-time, low noise, wide frequency range, excellent temperature versus frequency performance, and very little engineering effort for design in, makes them an excellent choice over conventional technology solutions. The clock oscillator families have stabilities as tight as ±20ppm, a range of phase jitter options, and temperature capabilities up to +105°C. These devices also offer extremely quick delivery for both standard and custom frequencies (16kHz to 2.1GHz).
IDT provides a brief overview of the timing solutions optimized for various configurations using the NXP (Freescale) QorIQ / Layerscape processors.
IDT provides a brief tutorial on the timing solutions required for NXP (Freescale) QorIQ / Layerscape processor-based systems.
Presented by Ron Wade, PCI Express timing expert.
Learn about how the ProXO2 family delivers the industry’s smallest package and uncompromised performance at 55fs typical phase jitter.