Features
- LP-HCSL outputs eliminate up to 16 terminated resistors
- PCIe Gen 1–7 compliance
- Drive both source-terminated and double-terminated loads
- Selectable output slew rate via pin
- Support both 85Ω and 100Ω output impedance versions
- Open-drain LOS (Loss-Of-Signal) indication output
- Power down tolerance (PDT)
- Flexible startup sequencing (FSS)
- Automatic clock parking (ACP)
- Dedicated OE# pins for each output
- 4-wire Side-Band interface and device daisy-chaining
- SMBus write protection features with 9 selectable addresses
- 4mm × 4mm 28-VFQFPN package
RC190xxA - Block Diagram
Description
The RC19004 is a 4-output PCIe Gen7 buffer that is backward compatible with earlier PCIe generations. The RC19004 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design.
Parameters
| Attributes | Value |
|---|---|
| Diff. Outputs | 4 |
| Diff. Output Signaling | LP-HCSL |
| Output Freq Range (MHz) | 1 - 400 |
| Diff. Inputs | 1 |
| Power Consumption Typ (mW) | 125, 128 |
| Supply Voltage (V) | 3.3 - 3.3 |
| Output Type | LP-HCSL |
| Battery Backup | No |
| Battery Seal | No |
| CPU Supervisory Function POR | No |
| Crystal Frequency Trimming | No |
| Frequency Out Pin | No |
| Inputs (#) | 1 |
| Input Freq (MHz) | 1 - 400 |
| Adjustable Phase | No |
| Noise Floor (dBc/Hz) | -154 |
| Channels (#) | 2 |
| Additive Phase Jitter Typ RMS (fs) | 30 |
| Function | Fanout Buffer |
| Input Type | LVDS, HCSL |
| Output Banks (#) | 1 |
| Core Voltage (V) | 3.3 |
| Output Voltage (V) | 0.8 |
| Product Category | Clock Buffers & Drivers, PCI Express Clocks |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| VFQFPN | 4.0 x 4.0 x 0.9 | 28 | 0.4 |
Application Block Diagrams
 | Power Delivery System for AI Accelerator Card Multiphase power system delivers high-current, sub-1V power for AI accelerator cards, enabling compact designs and high power density. |
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| Part Number | Status | Samples | Longevity | Stock | Package | Budgetary Price (USD) | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Output Impedance | Power Consumption Typ (mW) | Qty. per Reel (#) | Qty. per Carrier (#) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) | Country of Assembly | Country of Wafer Fabrication |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| RC19004A100GNL#BB0 | Active | Available | 2040 Apr | Out of Stock | VFQFPN | 1ku | $1.14 | 28# | Tray | 1 | 100 | 125mW | 0 | 490# | Yes | e3 Sn | -40 to 105°C | TAIWAN | TAIWAN |
| RC19004A100GNL#KB0 | Active | N/A | 2040 Apr | Out of Stock | VFQFPN | 1ku | $1.14 | 28# | Reel | 1 | 100 | 125mW | 2500# | 0 | Yes | e3 Sn | -40 to 105°C | TAIWAN | TAIWAN |
| RC19004AGNL#BB0 | Active | Available | 2040 Apr | Out of Stock | VFQFPN | 28# | Tray | 1 | 85 | 128mW | 0 | 490# | Yes | e3 Sn | -40 to 105°C | |||
| RC19004AGNL#KB0 | Active | N/A | 2040 Apr | Out of Stock | VFQFPN | 28# | Reel | 1 | 85 | 128mW | 2500# | 0 | Yes | e3 Sn | -40 to 105°C |
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- Application NotePDF 2.66 MB R31AN0080EU0102 Rev.1.02 Jun 02, 2026AI-generated Summary: Layout recommendations focus on PCIe Buffer/Mux devices across several families, emphasizing optimal PCB layer stack-up, trace sizing, and signal routing. Key points include using microstrip impedance calculations and tools like Polar Instruments for trace design, following common layout rules such as avoiding right-angle bends, and ensuring proper power supply, clocking, EMI-EMC, and thermal layouts. The document provides detailed guidance on signal integrity, current return paths, crosstalk reduction, and EPAD thermal management to enhance PCIe timing device performance.
- DatasheetRC190xx DatasheetRECOMMENDEDPDF 876 KB R31DS0016EU0129 Rev.1.29 May 11, 2026The RC190xx (RC19024, RC19020, RC19020A072, RC19016, RC19013, RC19008, RC19004, and RC19002) ultra-high performance fanout buffers support PCIe Gen1-7. The devices provide a Loss-Of-Signal (LOS) output for system monitoring and redundancy. The RC190xx also incorporate Power Down Tolerant (PDT) and Flexible Startup Sequencing (FSS) features, easing system design. They can drive both source-terminated and double-terminated loads, operating up to 400MHz. This document describes the main design and operational characteristics for RC190xx devices, including pin information, specifications, applications information, and packaging.
- Product Change NoticePDF 1003 KB Nov 20, 2024
- Application NotePDF 431 KB 7WDXRDKU4E7E-5-59216 Dec 06, 2023
- White PaperPDF 1.35 MB 7WDXRDKU4E7E-6-61930 Aug 05, 2020As PCIe data rates increase and jitter budgets tighten, accurately measuring reference clock jitter becomes more challenging. This paper examines how intrinsic jitter in test setups impacts measurement accuracy and compares results from Phase Noise Analyzers and digital sampling oscilloscopes. It also explores methods to isolate and correct for intrinsic jitter using noiseless PCIe Gen5 clock sources and real-world components such as fan-out buffers and clock generators.
- Application NotePDF 235 KB 7WDXRDKU4E7E-5-58851 Apr 08, 2015
- Application NotePDF 495 KB 7WDXRDKU4E7E-5-57312 May 12, 2014
- Application NotePDF 442 KB 7WDXRDKU4E7E-5-57298 May 08, 2014
- Application NotePDF 160 KB 7WDXRDKU4E7E-5-57287 May 06, 2014
- DatasheetRC190xx DatasheetRECOMMENDEDPDF 876 KB R31DS0016EU0129 Rev.1.29 May 11, 2026The RC190xx (RC19024, RC19020, RC19020A072, RC19016, RC19013, RC19008, RC19004, and RC19002) ultra-high performance fanout buffers support PCIe Gen1-7. The devices provide a Loss-Of-Signal (LOS) output for system monitoring and redundancy. The RC190xx also incorporate Power Down Tolerant (PDT) and Flexible Startup Sequencing (FSS) features, easing system design. They can drive both source-terminated and double-terminated loads, operating up to 400MHz. This document describes the main design and operational characteristics for RC190xx devices, including pin information, specifications, applications information, and packaging.
Recommended Documents (1)
- DatasheetRC190xx DatasheetRECOMMENDEDPDF 876 KB R31DS0016EU0129 Rev.1.29 May 11, 2026The RC190xx (RC19024, RC19020, RC19020A072, RC19016, RC19013, RC19008, RC19004, and RC19002) ultra-high performance fanout buffers support PCIe Gen1-7. The devices provide a Loss-Of-Signal (LOS) output for system monitoring and redundancy. The RC190xx also incorporate Power Down Tolerant (PDT) and Flexible Startup Sequencing (FSS) features, easing system design. They can drive both source-terminated and double-terminated loads, operating up to 400MHz. This document describes the main design and operational characteristics for RC190xx devices, including pin information, specifications, applications information, and packaging.
Datasheets (1)
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- Application NotePDF 2.66 MB R31AN0080EU0102 Rev.1.02 Jun 02, 2026AI-generated Summary: Layout recommendations focus on PCIe Buffer/Mux devices across several families, emphasizing optimal PCB layer stack-up, trace sizing, and signal routing. Key points include using microstrip impedance calculations and tools like Polar Instruments for trace design, following common layout rules such as avoiding right-angle bends, and ensuring proper power supply, clocking, EMI-EMC, and thermal layouts. The document provides detailed guidance on signal integrity, current return paths, crosstalk reduction, and EPAD thermal management to enhance PCIe timing device performance.
- Application NotePDF 431 KB 7WDXRDKU4E7E-5-59216 Dec 06, 2023
- Application NotePDF 1.99 MB 7WDXRDKU4E7E-5-57242 Mar 01, 2022
- White PaperPDF 1.35 MB 7WDXRDKU4E7E-6-61930 Aug 05, 2020As PCIe data rates increase and jitter budgets tighten, accurately measuring reference clock jitter becomes more challenging. This paper examines how intrinsic jitter in test setups impacts measurement accuracy and compares results from Phase Noise Analyzers and digital sampling oscilloscopes. It also explores methods to isolate and correct for intrinsic jitter using noiseless PCIe Gen5 clock sources and real-world components such as fan-out buffers and clock generators.View More (10)
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- Product Change NoticePDF 1003 KB Nov 20, 2024
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