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Features

  • High-Voltage Type (20V Rating)
  • Clock Polarity Control
  • Q and Q Outputs
  • Common Clock
  • Low Power TTL Compatible
  • Standardized Symmetrical Output Characteristics
  • 100% Tested for Quiescent Current at 20V
  • Maximum Input Current of 1μA at 18V Over Full Package Temperature Range; 100nA at 18V and +25 °C
  • 5V, 10V, and 15V Parametric Ratings
  • Noise Margin (Over Full Package Temperature Range):
    • 1V at VDD = 5V
    • 2V at VDD = 10V
    • 2.5V at VDD = 15V
  • Meets All Requirements of JEDEC Tentative Standard No.  13B,  "Standard  Specifications  for  Description  of 'B' Series CMOS Devices"

Description

The CD4042BMS radiation hardened Quad D latch contains four latch circuits, each strobed by a common clock. Complementary buffered outputs are available from each circuit. The impedance of the n- and p-channel output devices is balanced and all outputs are electrically identical.

Applications

  • Buffer Storage
  • Holding Register
  • General Digital Logic
Part NumberStatusSamplesStockPackageLead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Pitch (mm)Pkg. Dimensions (mm)DLA SMDPb (Lead) FreePb Free CategoryMOQTemp. Range (°C)
CD4042BDMSRObsoleteN/AOut of StockSBDIP16#TubeNot Applicable2.5mm20.3 x 7.5 x 2.415962R9663301VECExemptGold Plate over compliant Undercoat-e425-55 to +125°C
CD4042BKMSRObsoleteN/AOut of StockCFP16#TrayNot Applicable1.3mm10.4 x 6.9 x 0.005962R9663301VXCExemptGold Plate over compliant Undercoat-e425-55 to +125°C
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