Features
- Includes a loop filter
- VCO operating range: 850MHz to 1700MHz
- Output frequency range: 850MHz to 1700MHz
- Input frequency range: 9.6MHz to 216MHz
- Multiplying (output frequency/phase frequency detector (PFD) frequency)
- 49 to 127
- Divider
- 7-bit feedback divider and 3-bit input divider
- Power-down mode
- Multiple outputs with post-divider
- Power-on sequence is constraint-free
- Standby (STBY) sequence is constraint-free
- Process: TSMC 28nm HPM/HPC
Analog PLL IP for Frequency Multiplying Block Diagram
Description
The AT28MPLL0001MP1P7G18V1A is a 1.7GHz analog phase-locked loop (PLL) IP for frequency multiplying using TSMC's 28nm HPM/HPC (High-Performance Mobile/High-Performance Compact) process technology.
Parameters
| Attributes | Value |
|---|---|
| Product Category | PLL |
| Process | TSMC 28nm HPM/HPC |
| VCO Operating Range (MHz) | 850 - 1700 |
| Input Freq (MHz) | 9.6 - 216 |
| Output Freq Range (MHz) | 850 - 1700 |
| Analog Supply Voltage (V) | 1.62 - 1.98 |
| Digital Supply Voltage (V) | 0.935 - 1.08 |
| Spread Spectrum | No |
| Temp. Range (°C) | -40°C to +125°C |
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