Features
- Includes a loop filter
- VCO operating range: 2000MHz to 4096MHz
- Output frequency range: 1000MHz to 2048MHz
- Input frequency range: 12.5MHz to 200MHz
- Multiplying (output frequency/phase frequency detector (PFD) frequency): 40 to 120
- Divider
- 7-bit feedback divider and 3-bit input divider
- Power-down mode
- Multiple outputs with post-divider
- Power-on sequence is constraint-free
- Standby (STBY) sequence is constraint-free
- Process: TSMC 16nm FF+
Analog PLL IP for Frequency Multiplying Block Diagram
Description
The AT16CPLL0000MP4P1G18V1A is a 4.1GHz analog phase-locked loop (PLL) IP for frequency multiplying using TSMC's 16nm FF+ (FinFET Plus) process technology.
Parameters
| Attributes | Value |
|---|---|
| Product Category | PLL |
| Process | TSMC 16nm FF+ |
| VCO Operating Range (MHz) | 2000 - 4096 |
| Input Freq (MHz) | 12.5 - 200 |
| Output Freq Range (MHz) | 1000 - 2048 |
| Analog Supply Voltage (V) | 1.62 - 1.98 |
| Digital Supply Voltage (V) | 0.745 - 0.88 |
| Spread Spectrum | Yes |
| Temp. Range (°C) | -40°C to +125°C |
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