Renesas Interface IP includes PCIe/USB/SATA PHY, USB LINK, PCI Express LINK, SATA LINK, MIPI, FPD_Link, CAN, Ethernet AVB, and Ethernet TSN, which have proven track records in our microcontrollers and microcomputers.
Some of the following IPs are contracted for design. Please contact us for details.
| Function | IP Name | Process (or Soft Macro) | Status | Document | Inquiry |
|---|---|---|---|---|---|
| USB LINK | USB 3.1 (Gen1) xHCI Host Controller | Soft macro | Preliminary (Inquiry required) |  | Contact |
| USB 3.1 (Gen1) Peripheral Controller | Soft macro | Preliminary (Inquiry required) | | ||
| USB 2.0 EHCI Host Controller | Soft macro | Available | | ||
| USB 2.0 Peripheral Controller | Soft macro | Available | | ||
| USB 2.0 On-The-Go (OTG) Controller | Soft macro | Available | | ||
| PCI Express LINK Configuration Tool | Configurable PCI Express 4.0 Link Controller | Soft macro | Preliminary (Inquiry required) | | Contact |
| PCI Express 5.0 Link Controller | Soft macro | Available | | ||
| CAN | CAN Controller | Soft macro | Preliminary (Inquiry required) | | Contact |
| CAN FD | CAN FD Controller Multi-channel Type | Soft macro | Preliminary (Inquiry required) | | Contact |
| CAN FD Controller Single-channel Type | Soft macro | Available | | ||
| Ethernet AVB | Ethernet AVB End Station | Soft macro | Preliminary (Inquiry required) | | Contact |
| Ethernet TSN | Ethernet TSN End Station | Soft macro | Preliminary (Inquiry required) | Application example | Contact |
| Ethernet TSN Layer 2/3 Switch | Soft macro | Preliminary (Inquiry required) | Application example | ||
| FPD-Link | FPD-Link RX | TSMC 28nm | Available | | Contact |
| FPD-Link RX | TSMC 22nm | Available | | ||
| FPD-Link TX | TSMC 28nm | Available | | ||
| FPD-Link TX | TSMC 22nm | Available | | ||
| LVDS | LVDS IO Buffer | TSMC 7, 12, 16, 22, 28, 40nm & Samsung 14nm | Available | | Contact |
| PCIe/USB/SATA PHY | SerDes PHY up to 5Gbps PCIe2.1, USB 3.0 SS | TSMC 28nm | Available | | Contact |
| USB2.0 PHY: Multi-Port Transceiver with UTMI+ Level 3 interface | TSMC 28nm | Available | | ||
| USB2.0 PHY: Multi-Port Transceiver with UTMI+ Level 3 interface | Samsung 28nm | Available | | ||
| USB2.0 PHY: Single-Port Transceiver with UTMI+ Level 3 interface | TSMC 40nm | Available | | ||
| USB2.0 PHY: Single-Port Transceiver with UTMI+ Level 3 interface | TSMC 22nm | Available | | ||
| USB 2.0 Full-Speed (FS) Transceiver | TSMC 22nm | Available | | ||
| MIPI D-PHY | MIPI D-PHY: Receiver for CSI-2 | Soft macro & TSMC 22nm | Available | | Contact |
| MIPI D-PHY: Transceiver for CSI-2/DSI | Soft macro & TSMC 40nm | Available | | ||
| MIPI D-PHY: Transceiver for CSI-2/DSI | Soft macro & Samsung 28nm | Available | | ||
| MIPI D-PHY: Transceiver for CSI-2/DSI | Soft macro & TSMC 22nm | Available | | ||
| MIPI D-PHY(Controller) | MIPI CSI-2 Receiver IP Core | Soft macro | Preliminary (Inquiry required) | | Contact |
| MIPI DSI-2 Transmitter IP Core | Soft macro | Preliminary (Inquiry required) | |
By combining the USB 2.0 PHY with UTMI logic, we offer an interface solution that adheres to the standard interface specification (UTMI+ Level 3). Additionally, the USB 2.0 FS Transceiver is designed with a configuration where the I/O buffer for USB Full/Low Speed is separated from the USB 2.0 PHY, enabling a compact USB 2.0 FS solution with a smaller area footprint.
By integrating SerDes IP for USB SuperSpeed with PIPE logic, along with USB 2.0 PHY and UTMI logic, we deliver an interface solution that complies with the standard interface specifications (PIPE Interface and UTMI+ Level 3).
By combining SerDes IP with PIPE logic, we provide an interface solution that adheres to the PCIe standard specification. Additionally, by integrating MIPI D-PHY with the CSI-2/DSI Link Controller, we offer an interface solution that complies with the MIPI CSI-2/DSI standard specification.
