Features
- < 100mW core power (at 3.3V)
- < 0.5ps RMS phase jitter (typical)
- PCIe Gen 1/2/3/4/5 spread spectrum off
- PCIe Gen 1/2/3/4 spread spectrum on
- 1/10GbE, USB 3.0
- Supports both crystal (8MHz to 40MHz) and external clock input(1MHz to 350MHz)
- 4 universal output pairs: LVPECL, LVDS, HCSL, or 8 LVCMOS outputs
- 4 independent frequencies with 0.001MHz to 350MHz output range
- Reference output
- 1.8V/2.5V/3.3V core and output voltages
- 2 programmable I²C addresses allowing multiple devices to be used in the same system.
- Up to 4 different configuration sets in OTP non-volatile memory
- Supported by the Renesas IC Toolbox (RICBox) software tool
- Quick sampling and customization process supported by online form submission
- 4mm x 4mm 24-VFQFPN package
- -40°C to +85°C operating temperature range
Description
The 5P49V6965 is a member of the VersaClock® 6E programmable clock generator family. The 5P49V6965 is intended for high-performance consumer, networking, industrial, computing, and data-communications applications. The reference clock can come from one of the two redundant clock inputs. A glitchless manual switchover function allows one of the redundant clocks to be selected during normal operation.
Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I²C interface.
Parameters
| Attributes | Value |
|---|---|
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 |
| Outputs (#) | 5 |
| Output Type | LVCMOS, LVPECL, HCSL, LVDS |
| Output Freq Range (MHz) | 1 - 350 |
| Input Freq (MHz) | 1 - 350 |
| Inputs (#) | 2 |
| Input Type | Crystal, LVCMOS, LVPECL, LVDS, HCSL |
| Output Banks (#) | 4 |
| Core Voltage (V) | 1.8V, 2.5V, 3.3V |
| Output Voltage (V) | 1.8V, 2.5V, 3.3V |
| Phase Jitter Typ RMS (ps) | 0.5 |
| Prog. Interface | I2C, OTP |
| Spread Spectrum | Yes |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| VFQFPN | 4.0 x 4.0 x 0.9 | 24 | 0.5 |
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Filters
Software & Tools
Sample Code
Simulation Models
The VersaClock® 6E programmable clock generator devices offer a combination of low power, flexibility and performance for a wide range of applications. These features make it ideal for simplifying system design by replacing multiple discrete timing components and reducing bill of materials (BOM). The VersaClock 6E supports operating voltages from 1.8 to 3.3 V, differential (LVPECL/HCSL/LVDS/LP-HCSL) and LVCMOS output types, and fractional dividers to accurately generate virtually any frequency. Products satisfy system requirements from oscillator replacement to PCIe® Gen 1/2/3 and to communications applications, while consuming very little power.
For more information about VersaClock 6E, visit the VersaClock Programmable Clocks page.
This video provides an overview of the Renesas VersaClock® 6, highlighting its key features within the programmable clock generator family. Discover how VersaClock® 6 combines low power consumption with high flexibility and performance, simplifying system design by replacing multiple discrete timing components.
IDT provides a brief overview of the timing solutions optimized for various configurations using the NXP (Freescale) QorIQ / Layerscape processors.
Resources
IDT provides a brief tutorial on the timing solutions required for NXP (Freescale) QorIQ / Layerscape processor-based systems.
Presented by Ron Wade, PCI Express timing expert.
News & Blog Posts
Blog Post
Feb 1, 2022
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Blog Post
Jun 15, 2019
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News
Jan 23, 2018
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