HIP4020

In the Functional Block Diagram of the HIP4020, the four switches and a load are arranged in an H-configuration so that the drive voltage from terminals OUTA and OUTB can be cross-switched to change the direction of current flow in the load. This is commonly known as 4-quadrant load control. As shown Figure 1, switches Q₁ and Q₄ are conducting or in an ON state when current flows from V_DD through Q₁ to the load, and then through Q₄ to terminal V_SSB; where load terminal OUTA is at a positive potential with respect to OUTB. Switches Q₁ and Q₄ are operated synchronously by the control logic. The control logic switches Q₃ and Q₂ to an open or OFF state when Q₁ and Q₄ are switched ON. To reverse the current flow in the load, the switch states are reversed where Q₁ and Q₄ are OFF while Q₂ and Q₃ are ON. Consequently, current then flows from V_DD through Q₃, through the load, and through Q₂ to terminal V_SSA, and load terminal OUTB is then at a positive potential with respect to OUTA. Terminals ENA and ENB are ENABLE inputs for the Logic A and B Input Controls. The ILF output is an Overcurrent Limit Fault Flag Output and indicates a fault condition for either Output A or B or both. The V_DD and V_SS are the Power Supply reference terminals for the A and B Control Logic Inputs and ILF Output. While the V_DD positive power supply terminal is internally connected to each bridge driver, the V_SSA and V_SSB power supply terminals are separate and independent from V_SS and may be more negative than the V_SS ground reference terminal. The use of level shifters in the gate drive circuitry to the NMOS (low-side) output stages allows controlled level shifting of the output drive relative to ground.