Features
- Includes a loop filter
- VCO operating range: 720MHz to 1680MHz
- Output frequency range: 45MHz to 1680MHz
- Input frequency range: 22.528MHz to 420MHz
- Multiplying (output frequency/phase frequency detector (PFD) frequency): 16
- Divider
- 4-bit feedback divider, 2-bit input divider, and 4-bit output divider
- Power-down mode
- SSC input is not available
- Power-on sequence is constraint-free
- Standby (STBY) sequence is constraint-free
- Process: TSMC 28nm HPM/HPC
Analog PLL IP for Skew Adjust Block Diagram
Description
The AT28MPLL0002SK1P7G18V is a 1.68GHz analog phase-locked loop (PLL) IP for skew adjust using TSMC's 28nm HPM/HPC (High-Performance Mobile/High-Performance Compact) process technology.
Parameters
| Attributes | Value |
|---|---|
| Product Category | PLL |
| Process | TSMC 28nm HPM/HPC |
| VCO Operating Range (MHz) | 720 - 1680 |
| Input Freq (MHz) | 22.528 - 420 |
| Output Freq Range (MHz) | 45 - 1680 |
| Analog Supply Voltage (V) | 1.62 - 1.98 |
| Digital Supply Voltage (V) | 0.935 - 1.08 |
| Spread Spectrum | No |
| Temp. Range (°C) | -40°C to +125°C |
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