Features
- Includes a loop filter
- VCO operating range: 672MHz to 1400MHz
- Output frequency range: 48MHz to 1400MHz
- Input frequency range: 12MHz to 400MHz
- Multiplying (output frequency/phase frequency detector (PFD) frequency)
- 14, 28, and 56
- Divider
- 4-bit feedback divider, 2-bit input divider, and 4-bit output divider
- Power-down mode
- SSC input is not available
- Power-on sequence is constraint-free
- Standby (STBY) sequence is constraint-free
- Process: TSMC 28nm HPC+
Analog PLL IP for Skew Adjust Block Diagram
Description
The AT28_PLL0002SK1P7G18V1B is a 1.4GHz analog phase-locked loop (PLL) IP for skew adjust using TSMC's 28nm HPC+ (High-Performance Compact Plus) process technology.
Parameters
| Attributes | Value |
|---|---|
| Product Category | PLL |
| Process | TSMC 28nm HPC+ |
| VCO Operating Range (MHz) | 672 - 1400 |
| Input Freq (MHz) | 12 - 400 |
| Output Freq Range (MHz) | 48 - 1400 |
| Analog Supply Voltage (V) | 1.62 - 1.98 |
| Digital Supply Voltage (V) | 0.935 - 1.08 |
| Spread Spectrum | No |
| Temp. Range (°C) | -40°C to +125°C |
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