Overview

Description

The generation of digital metadata from the acquisition, process, analysis, and understanding of visuals requires a high-performance MPU with artificial intelligence (AI). This System-on-Module (SoM) solution from Renesas enables designers to manage these critical decision processes. Unlike a single-board computer, an SoM serves a special function, keeping the baseboard costs low as well as making it easier to enhance an embedded computer application.

System Benefits:

  • High-performance dual core Arm® Cortex®-A53 MPU
  • Dedicated high-speed hardware AI inference (DRP-AI)
  • SMARC 2.1 compliant design

Comparison

Applications

Applications

  • Vision Applications
  • Smart Camera Sensor
  • Embedded mobile mesh networks
  • Scalable industrial embedded computers

Winning Combinations Interactive Diagram

Select a block to discover products for your design

4:3 ratio Sheet.1 Sheet.2 Sheet.3 Sheet.4 EU092 EU092 EU092 12S 12S 12S I2C I2C I2C SERO-3 SERO-3 SERO-3 SDIO SDIO SDIO I2C GP I2C GP I2C GP I2C PM I2C PM I2C PM SPIO SPIO SPIO GPIO (0:11) GPIO (0:11) GPIO (0:11) USB (3.1) USB (3.1) USB (3.1) GMII/MII GMII/MII GMII/MII JTAG JTAG JTAG PCIe PCIe PCIe eMMC eMMC eMMC LPDDR4 LPDDR4 LPDDR4 Sheet.30 Sheet.31 Sheet.32 Sheet.33 Sheet.34 Sheet.35 Sheet.36 Sheet.37 Sheet.38 Sheet.39 Sheet.40 Sheet.41 Sheet.42 Sheet.43 Sheet.44 Sheet.45 Sheet.46 Sheet.47 Sheet.48 Sheet.49 Sheet.50 Sheet.51 Sheet.52 Sheet.53 Sheet.54 Sheet.55 Sheet.56 Sheet.57 Sheet.58 Sheet.59 Sheet.60 Sheet.61 Sheet.62 Sheet.63 Sheet.64 Sheet.65 Sheet.66 Sheet.67 Sheet.68 Sheet.69 Sheet.70 Sheet.71 Sheet.72 Sheet.73 Sheet.74 Sheet.75 Sheet.76 Sheet.77 Sheet.78 Sheet.79 Sheet.80 Sheet.81 Sheet.82 Sheet.83 Sheet.84 Sheet.85 Sheet.86 Sheet.87 Sheet.88 Sheet.89 Sheet.90 Sheet.91 Sheet.92 Sheet.93 Sheet.94 Sheet.95 Sheet.96 Sheet.97 Sheet.98 Sheet.99 Connector 1.165 Connector 1.165.101 Connector 1.165.102 Connector 1.165.103 Connector 1.165.104 Connector 1.165.105 Connector 1.165.106 Connector 1.165.107 Connector 1.165.108 Connector 1.165.109 Connector 1.165.110 Connector 1.165.111 Connector 1.165.112 Connector 1.165.113 Connector 1.165.114 Connector 1.165.115 Connector 1.165.116 Connector 1.165.117 Connector 1.165.118 Input Input.120 Input.121 Input.122 Input.123 Input.124 Input.125 Input.126 Input.127 0.8V, Timing 1 0.8V, Timing 1 0.8V, Timing 1 1.1V, Timing 1 1.1V, Timing 1 1.1V, Timing 1 1.8V, Timing 1 1.8V, Timing 1 1.8V, Timing 1 0.8V, Timing 2 0.8V, Timing 2 0.8V, Timing 2 1.8V, Timing 3 1.8V, Timing 3 1.8V, Timing 3 3.3V, Timing 4 3.3V, Timing 4 3.3V, Timing 4 0.8V, Timing 5 0.8V, Timing 5 0.8V, Timing 5 2.5V 2.5V 2.5V 1.0V 1.0V 1.0V 5.0VIN 5.0VIN 5.0VIN Input.138 GbE0.1 GbE0.1 GbE0.1 I2C I2C I2C eMMC eMMC eMMC LPDDR4 LPDDR4 LPDDR4 JTAG JTAG JTAG GMII/MII GMII/MII GMII/MII Supplied trough SMARC 2.1 Connector Supplied trough SMARC 2.1 Connector Supplied troughSMARC 2.1 Connector PCIe PCIe PCIe USB (3.1) USB (3.1) USB (3.1) Sheet.162 Sheet.163 Sheet.164 Sheet.165 Sheet.166 Sheet.167 Sheet.168 Sheet.169 Sheet.170 SPI SPI SPI QSPI QSPI QSPI SDIO SDIO SDIO I2C I2C I2C 12S 12S 12S SERO-3 SERO-3 SERO-3 GPIO (0:11) GPIO (0:11) GPIO (0:11) Sheet.180 Sheet.181 Sheet.182 Sheet.183 Sheet.184 Sheet.185 Sheet.186 PMIC PMIC PMIC MPU MPU MPU LDO LDO LDO GbE PHY GbE PHY GbE PHY JTAG JTAG JTAG LPDDR4 LPDDR4 LPDDR4 eMMC eMMC eMMC VersaClock VersaClock VersaClock SMARC 2.1 connector SMARC 2.1 connector SMARC 2.1 connector
Exiting Interactive Block Diagram