特長
- The FPD-Link Transmitter can be used for an analog transmitter with the ANSI/TIA/EIA-644 interface
- Technology is TSMC 22nm ULP (Ultra-Low Power) 1p10M
- Supply voltage can be applied at 0.9V for the core voltage, 1.8V for I/O voltage
- With an input clock at 75MHz and input data at 75Mbps, the maximum transmission data rate of each channel is 525Mbps
Flat Panel Display Link Transmitter IP (TSMC 22nm ULP) Block Diagram
説明
Renesas' Flat Panel Display Link (FPD-Link) Transmitter is a useful 5-channel LVDS driver. The IP enables 7:1 parallel-to-serial converting of TSMC's 22nm ULP (Ultra-Low Power) process.
パラメータ
| 属性 | 値 |
|---|---|
| Protocol | FPD-Link |
| Function | Transmitter |
| Process | TSMC 22nm ULP |
| Data Rate (Mbps) | 525 |
| Interface | LVDS |
| Number of Channels | 5 |
| Input Freq (MHz) | 75 - 75 |
| Supply Voltage Range (V) | Core: 0.9V, I/O: 1.8V |
