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2K x 36 x 2 Triple-Bus FIFO, 3.3V

パッケージ情報

CADモデル:View CAD Model
Pkg. Type:TQFP
Pkg. Code:PK128
Lead Count (#):128
Pkg. Dimensions (mm):20.0 x 14.0 x 1.4
Pitch (mm):0.5

環境及び輸出分類情報

Pb (Lead) FreeNo
Moisture Sensitivity Level (MSL)3
ECCN (US)
HTS (US)

製品スペック

Lead Count (#)128
Pb (Lead) FreeNo
Carrier TypeTray
ArchitectureBi-directional
Bus Width (bits)36
Core Voltage (V)3.3
Density (Kb)144
Family NameTriple-Bus FIFO
FunctionBus Matching
I/O Frequency (MHz)100 - 100
I/O Type3.3 V LVTTL
InterfaceSynchronous
Length (mm)20
MOQ36
Moisture Sensitivity Level (MSL)3
Organization2K x 36 x 2
Package Area (mm²)280
Pb Free Categorye0
Pitch (mm)0.5
Pkg. Dimensions (mm)20.0 x 14.0 x 1.4
Pkg. TypeTQFP
Qty. per Carrier (#)72
Qty. per Reel (#)0
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Temp. Range (°C)0 to 70°C
Thickness (mm)1.4
Width (mm)14
掲載No

説明

The 72V3656 is a 2K x 36 x 2 Triple Bus sync FIFO memory that is a 3.3V version of the 723656. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. This device can operate in the IDT Standard mode or First Word Fall Through mode. Two 72V3656 FIFO's can be combined with unidirectional FIFO's capable of First Word Fall Through timing (i.e. the SuperSync FIFO family) to form a depth expansion.