特長
- Dual-Port allows simultaneous access of the same memory location
- Selectable Pipelined or Flow-Through output mode
- Counter enable and repeat features
- Dual chip enables allow for depth expansion without additional logic
- Full synchronous operation on both ports
- Separate byte controls for multiplexed bus and bus matching compatibility
- Dual Cycle Deselect (DCD) for Pipelined Output mode
- LVTTL- compatible, single 3.3V (±150mV) power supply for core
- LVTTL compatible, selectable 3.3V (±150mV) or 2.5V (±100mV) power supply for I/Os and control signals on each port
- Available in a 256-pin BGA, 208-pin fpBGA and 208-pin PQFP packages
- Includes JTAG functionality
- Industrial temperature range (-40C to +85C) is available
70V3599 - Block Diagram
説明
The 70V3599 is a high-speed 128K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3599 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.
パラメータ
| 属性 | 値 |
|---|---|
| Core Voltage (V) | 3.3 |
| Bus Width (bits) | 36 |
| Density (Kb) | 4608 |
| Pkg. Code | BC256, BCG256, BF208, BFG208 |
| Interface | Sync |
| I/O Type | 3.3 V LVTTL, 2.5 V LVTTL |
| I/O Frequency (MHz) | 133 - 133, 166 - 166 |
| Temp. Range (°C) | -40 to 85°C, 0 to 70°C |
| Architecture | Dual-Port |
| Organization | 128K x 36 |
| Function | Counters, Dual Clocks, JTAG |
| Output Type | Flowthrough, Pipelined |
