メインコンテンツに移動

特長

  • Packaged in 16-pin TSSOP
  • Pb (lead) free package
  • Operating voltage of 3.3 V
  • Low power consumption
  • Input frequency of 25 MHz
  • Low long-term jitter
  • 2.5 V to 3.3 V clock outputs

説明

The 650-40 is a clock chip designed for use in Ethernet Switch applications. Using IDT’s patented Phase-Locked Loop (PLL) techniques, the device takes a 25 MHz crystal input and produces various output clock frequencies as listed in Output Select Table.

適用されたフィルター