Features
- Packaged in 16-pin TSSOP
- Pb (lead) free package
- Operating voltage of 3.3 V
- Low power consumption
- Input frequency of 25 MHz
- Low long-term jitter
- 2.5 V to 3.3 V clock outputs
Description
The 650-40 is a clock chip designed for use in Ethernet Switch applications. Using IDT’s patented Phase-Locked Loop (PLL) techniques, the device takes a 25 MHz crystal input and produces various output clock frequencies as listed in Output Select Table.
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Temp. Grade | Pb (Lead) Free | Carrier Type |
|---|---|---|---|---|---|---|---|---|
| 650G-40LF | Obsolete | N/A | Out of Stock | TSSOP | 16# | C | Yes | Tube |
| 650G-40LFT | Obsolete | N/A | Out of Stock | TSSOP | 16# | C | Yes | Reel |
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- End Of Life NoticePDF 72 KB 7WDXRDKU4E7E-5-55694 Jun 20, 2013
- Product Change NoticePDF 361 KB 7WDXRDKU4E7E-5-55130 Mar 24, 2013
- Product Change NoticePDF 663 KB 7WDXRDKU4E7E-5-57154 Apr 08, 2014
Recommended Documents (1)
Datasheets (1)
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- Product Change NoticePDF 663 KB 7WDXRDKU4E7E-5-57154 Apr 08, 2014
- End Of Life NoticePDF 72 KB 7WDXRDKU4E7E-5-55694 Jun 20, 2013
- Product Change NoticePDF 361 KB 7WDXRDKU4E7E-5-55130 Mar 24, 2013
Product Notices (PCN, EOL, etc) (4)
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riic SCLK rate is screwy
Ive got a project S5D9 running in SSP 1.7.5 as an upgrade from SSP1.5 I have a lot of stuff out on the I2C buses and the relevant threads are set up as: One thread that talks to iic1 and one peripheral on it. It runs this ...
May 30, 2020
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