Features
- Compliance
- Compliant with Universal Serial Bus Specification Revision 2.0
- Compliant with AMBA®3 AHB-Lite Protocol v1.0 Specification
- Compliant with UTMI+ Specification Rev 1.0 Level 3
- USB function
- Supports control, bulk, interrupt, and isochronous transfers
- Supports Battery Charging Specification Rev 1.2
- Maximum of 15 PIPE (PIPE 0 not included) can be used (configurable)
- AHB I/F
- Conforms to Advanced Microcontroller Bus Architecture (AMBA) 3/Advanced High-performance Bus (AHB) Lite (AMBA3 AHB-Lite)
- Data bus width: 32 bits
- Supports big-endian and little-endian
- Provides master interface and slave interface
- Supports the AHB-Lite specification
- RAM interface
- 64-bit 1-port SRAM interface for the buffer memory outside; the memory size is up to 16KByte
- UTMI+ interface
- Supports USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) interface for High-Speed/Full-Speed
- Related products
- R8A66597: USB 2.0 host/peripheral controller
- This core obtained USB-IF's certification as R8A66597BG
USB 2.0 Peripheral Controller IP Block Diagram
Description
The Renesas USB 2.0 Peripheral Controller IP is compliant with the Universal Serial Bus (USB) 2.0 Specification. This IP is based on the proven R8A66597 USB host/peripheral controller. The system interface of this IP is Advanced Microcontroller Bus Architecture (AMBA®) 3/Advanced High-performance Bus (AHB) Lite (AMBA3 AHB-Lite), and the PHY interface is the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) Specification Level 3. This IP supports High-Speed (480Mbps) and Full-Speed (12Mbps) transfer.
Parameters
| Attributes | Value |
|---|---|
| Protocol | USB 2.0 |
| Function | Controller |
| Process | Soft macro |
| Data Rate (Mbps) | 480, 12 |
| Interface | AMBA®3 AHB-Lite, UTMI+ Level 3 |
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