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Description

The R8C/L35C Group is supported only for customers who have already adopted these products. The RL78/L12, RL78/L13 Groups are recommended for new designs.

The R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group, R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, and R8C/L3AB Group of single-chip MCUs incorporate the R8C CPU core, which implements a powerful instruction set for a high level of efficiency and supports a 1Mb address space, allowing execution of instructions at high speed. In addition, the CPU core integrates a multiplier for high-speed operation processing.

Power consumption is low, and the supported operating modes allow additional power control. These MCUs are designed to maximize EMI/EMS performance. Integration of many peripheral functions, including multifunction timer and serial interface, helps reduce the number of system components. The R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, and R8C/L3AA Group have data flash (1KB × 4 blocks) with the background operation (BGO) function.

Parameters

AttributesValue
Bit Size16
Program Memory (KB)48
RAM (KB)6
Operating Freq (Max) (MHz)20
CPUR8C
RTCYes
LVD or PVDYes
DMANo
I/O Ports41
Timer8-bit x 3-ch, 16-bit x 4-ch
PWMNo
ADC8-bit x 10-ch, 10-bit x 10-ch
DAC8-bit x 2-ch
EthernetNo
Human Machine InterfaceLCD Segment Count x 96
Temp. Range (°C)-40 to +85

Package Options

Pkg. TypePkg. Dimensions (mm)Lead Count (#)
LQFP10 x 10 x 1.752

Applications

  • Household Appliances
  • Office Equipment
  • Audio Equipment
  • Consumer Products
Part NumberStatusSamplesLongevityStockRoHSPackageBudgetary Price (USD)RAM (KB)Lead Count (#)Temp. Range (°C)Country of AssemblyCountry of Wafer Fabrication
R5F2L357CDFP#31PreviewN/A2029 JanOut of StockContactLQFP1ku | $3.886KB52#-40 to +85CHINAJAPAN
R5F2L357CDFP#30ObsoleteN/AIn StockRoHS:EN
RoHS:JA
LQFP6KB52#-40 to +85
R5F2L357CDFP#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP6KB52#-40 to +85
R5F2L357CNFP#30ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP6KB52#-20 to +85
R5F2L357CNFP#31NRNDN/A2029 JanOut of StockContactLQFP1ku | $3.676KB52#-20 to +85CHINAJAPAN
R5F2L357CNFP#50ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP6KB52#-20 to +85
R5F2L357CNFP#51NRNDN/A2029 JanOut of StockContactLQFP6KB52#-20 to +85
R5F2L357CNFP#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP6KB52#-20 to +85
R5F2L358CDFP#30ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP8KB52#-40 to +85
R5F2L358CDFP#31NRNDN/A2029 JanIn StockContactLQFP1ku | $3.988KB52#-40 to +85CHINAJAPAN
R5F2L358CDFP#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP8KB52#-40 to +85
R5F2L358CNFP#30NRNDN/A2029 JanOut of StockContactLQFP8KB52#-20 to +85
R5F2L358CNFP#31NRNDN/AOut of StockContactLQFP8KB52#-20 to +85
R5F2L358CNFP#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP8KB52#-20 to +85
R5F2L35ACDFP#30NRNDN/A2029 JanOut of StockContactLQFP10KB52#-40 to +85
R5F2L35ACDFP#31NRNDN/AOut of StockContactLQFP10KB52#-40 to +85
R5F2L35ACDFP#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP10KB52#-40 to +85
R5F2L35ACNFP#30ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP10KB52#-20 to +85
R5F2L35ACNFP#31NRNDN/A2029 JanOut of StockContactLQFP10KB52#-20 to +85
R5F2L35ACNFP#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP10KB52#-20 to +85
R5F2L35CCDFP#30ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP10KB52#-40 to +85
R5F2L35CCDFP#31NRNDN/A2029 JanIn StockContactLQFP1ku | $4.3910KB52#-40 to +85CHINAJAPAN
R5F2L35CCDFP#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP10KB52#-40 to +85
R5F2L35CCNFP#30NRNDN/A2029 JanOut of StockContactLQFP10KB52#-20 to +85
R5F2L35CCNFP#31NRNDN/AOut of StockContactLQFP10KB52#-20 to +85
R5F2L35CCNFP#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP10KB52#-20 to +85

Knowledge Base

  1. (R8C) Are there any hardware precautions for accurate A/D conversion?

    In order to perform A/D conversion, it is necessary to fully charge the internal capacitor, but if the impedance of the A/D conversion target is high, the discharge and charge will take time and the conversion value will not be accurate. For correct A/D ...

    Jun 19, 2006
  2. Can a parallel programmer verify the program in condition the ROM code protect is enabled?

    The ROM code protect is enabled at the first MCU reset after setting the ROM code protect function. If there is no reset after writing the program, the program can be verified. Contact the parallel programmer manufacturer for programmer specifications.

    Dec 26, 2017
  3. Are the contents of RAM still retained when stop mode resets?

    If the Vcc is maintained above the RAM retention voltage VRAM or higher, the contents of the RAM will be retained even when the stop mode is released by reset. Please refer to the Hardware Manual for more details.

    Feb 14, 2006
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