Description
The R8C/32D Group is supported only for customers who have already adopted these products. The RL78/G11 Group is recommended for new designs.
The R8C/32D Group of single-chip MCUs incorporates the R8C CPU core, employing sophisticated instructions for a high level of efficiency. With 1Mb of address space, and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing.
Power consumption is low, and the supported operating modes allow additional power control. These MCUs are designed to maximize EMI/EMS performance. Integration of many peripheral functions, including multifunction timer and serial interface, reduces the number of system components.
Applications
- Electronic Household Appliances
- Office Equipment
- Audio Equipment
- Consumer Equipment
| Part Number | Status | Samples | Longevity | Stock | RoHS | Package | Budgetary Price (USD) | Carrier Type | Country of Assembly | Country of Wafer Fabrication |
|---|---|---|---|---|---|---|---|---|---|---|
| R5F21321DDSP#30 | NRND | N/A | 2029 Jan | Out of Stock | Contact | LSSOP | 1ku | $2.11 | Tube | CHINA | JAPAN |
| R5F21321DDSP#54 | NRND | N/A | 2029 Jan | Out of Stock | Contact | LSSOP | Embossed Tape | |||
| R5F21321DDSP#U0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LSSOP | Tube | ||||
| R5F21321DDSP#W4 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LSSOP | Embossed Tape | ||||
| R5F21321DNSP#30 | NRND | N/A | 2029 Jan | Out of Stock | Contact | LSSOP | 1ku | $2.01 | Tube | CHINA | JAPAN |
| R5F21321DNSP#54 | NRND | N/A | 2029 Jan | Out of Stock | Contact | LSSOP | 1ku | $1.81 | Embossed Tape | CHINA | JAPAN |
| R5F21321DNSP#U0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LSSOP | Tube | ||||
| R5F21321DNSP#W4 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LSSOP | Embossed Tape | ||||
| R5F21322DDSP#30 | NRND | N/A | 2029 Jan | Out of Stock | Contact | LSSOP | Tube | |||
| R5F21322DDSP#54 | NRND | N/A | 2029 Jan | Out of Stock | Contact | LSSOP | 1ku | $2.14 | Embossed Tape | CHINA | JAPAN |
| R5F21322DDSP#U0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LSSOP | Tube | ||||
| R5F21322DDSP#W4 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LSSOP | Embossed Tape | ||||
| R5F21322DNSP#30 | NRND | N/A | 2029 Jan | Out of Stock | Contact | LSSOP | 1ku | $2.04 | Tube | CHINA | JAPAN |
| R5F21322DNSP#54 | NRND | N/A | 2029 Jan | Out of Stock | Contact | LSSOP | 1ku | $2.04 | Embossed Tape | CHINA | JAPAN |
| R5F21322DNSP#U0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LSSOP | Tube | ||||
| R5F21322DNSP#W4 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LSSOP | Embossed Tape | ||||
| R5F21324DDSP#30 | NRND | N/A | 2029 Jan | Out of Stock | Contact | LSSOP | Tube | |||
| R5F21324DDSP#54 | NRND | N/A | 2029 Jan | Out of Stock | Contact | LSSOP | Embossed Tape | |||
| R5F21324DDSP#U0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LSSOP | Tube | ||||
| R5F21324DDSP#W4 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LSSOP | Embossed Tape | ||||
| R5F21324DNSP#30 | NRND | N/A | 2029 Jan | Out of Stock | Contact | LSSOP | 1ku | $2.45 | Tube | CHINA | JAPAN |
| R5F21324DNSP#54 | NRND | N/A | 2029 Jan | Out of Stock | Contact | LSSOP | 1ku | $2.49 | Embossed Tape | CHINA | JAPAN |
| R5F21324DNSP#U0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LSSOP | Tube | ||||
| R5F21324DNSP#W4 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LSSOP | Embossed Tape |
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- Product Change Notice
- Tool News - Note
- Application NoteAI-generated Summary: The document explains the differences in flash memory functions between the R8C/36M Group and RL78/G14. It outlines the flash memory map and rewrite modes of the R8C/36M Group, including CPU rewrite mode, standard serial I/O mode, and parallel MO mode. The user ROM area is divided into blocks and can be rewritten using different methods, such as software commands from the CPU or external programmers. The boot ROM area stores the standard boot program for serial I/O rewriting.
- Application NoteAI-generated Summary: The document explains how to migrate from the R8C/36M Group's Timer RA to the RL78/G14's Timer RJ, covering five operational modes: timer mode, pulse output mode, event counter mode, pulse width measurement mode, and pulse period measurement mode. Timer RA is an 8-bit timer with an 8-bit prescaler, while Timer RJ is a 16-bit timer with a reload register and down counter. Both timers support equivalent functions, including counting internal or external pulses and measuring pulse width or period. The guide details hardware configurations, software descriptions, option byte settings, function specifications, and flow charts for each mode.Related Files:
- Application NoteAI-generated Summary: The document explains how to migrate the D/A converter functionality from the R8C/36M Group to the RL78/G14 family with 96-KB or larger flash memory. It compares the specifications, highlighting differences such as the reference voltage source (Vref pin for R8C/36M and Vpp pin for RL78/G14) and output pins. It also details register differences and recommends selecting normal mode on RL78/G14 to match R8C/36M operation. Related manuals and technical updates are referenced for further information.
- Application NoteAI-generated Summary: The document explains the migration method from the R8C/36M group to the RL78/G14 family focusing on power control via CPU clock operation modes. It summarizes power control modes in R8C/36M, including standard operating, wait, and stop modes, and compares them with RL78/G14 CPU clock modes such as normal operation, HALT, STOP, and SNOOZE. Key differences include the clock source selection after reset and the inability of RL78/G14 to use the low-speed on-chip oscillator as the CPU clock. Detailed mode transition diagrams and user manual references are provided.
- Application NoteAI-generated Summary: The document explains how to migrate the reset function from the R8C/36M group to the RL78/G14 family. It compares the reset types of both families, showing that RL78/G14 supports more reset types. It details the correspondence between reset functions and highlights differences in reset behavior, such as clock settings and protection states after reset. The guide also specifies conditions for hardware reset via the RESET pin for both groups, emphasizing timing and voltage requirements.
- Application NoteAI-generated Summary: The document details the migration process from the R8C/32C group A/D converter to the RL78/G11 A/D converter, explaining differences in operation modes and result storage. It highlights that RL78/G11 uses a single register for A/D results, unlike R8C/32C which uses multiple registers. It also explains the bit alignment differences in 10-bit and 8-bit resolutions, requiring software adjustments for compatibility. The guide covers various operation modes including one-shot, repeat, single sweep, and repeat sweep modes, with hardware and software descriptions, sample code, and reference materials.Related Files:
- Application NoteAI-generated Summary: The document explains how to migrate timer functions from R8C/36M's Timer RC to RL78/G14's Timer Array Unit (TAU). It covers three main modes: timer mode with input capture, timer mode with output compare, and PWM mode. RL78/G14 uses multiple 16-bit timer channels that can operate independently or combined for high accuracy. The PWM2 mode of R8C/36M is not supported by RL78/G14 but can be implemented using other RL78 series timers.Related Files:
- Product Change Notice
- Application NoteAI-generated Summary: The document details the migration from the R8C/36M group to the RL78/G14 family, focusing on serial interface modes. It compares clock synchronous and asynchronous serial I/O modes in R8C/36M with the Serial Array Unit (SAU) modes in RL78/G14, including 3-wire serial, UART, and simplified I2C communications. Differences in hardware features, interrupt functions, error detection, and clock settings between the two families are highlighted, aiding developers in adapting their serial communication implementations.Related Files:
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Manuals & Guides (5)
- Application NoteAI-generated Summary: The document explains the differences in flash memory functions between the R8C/36M Group and RL78/G14. It outlines the flash memory map and rewrite modes of the R8C/36M Group, including CPU rewrite mode, standard serial I/O mode, and parallel MO mode. The user ROM area is divided into blocks and can be rewritten using different methods, such as software commands from the CPU or external programmers. The boot ROM area stores the standard boot program for serial I/O rewriting.
- Application NoteAI-generated Summary: The document explains how to migrate from the R8C/36M Group's Timer RA to the RL78/G14's Timer RJ, covering five operational modes: timer mode, pulse output mode, event counter mode, pulse width measurement mode, and pulse period measurement mode. Timer RA is an 8-bit timer with an 8-bit prescaler, while Timer RJ is a 16-bit timer with a reload register and down counter. Both timers support equivalent functions, including counting internal or external pulses and measuring pulse width or period. The guide details hardware configurations, software descriptions, option byte settings, function specifications, and flow charts for each mode.Related Files:
- Application NoteAI-generated Summary: The document explains how to migrate the D/A converter functionality from the R8C/36M Group to the RL78/G14 family with 96-KB or larger flash memory. It compares the specifications, highlighting differences such as the reference voltage source (Vref pin for R8C/36M and Vpp pin for RL78/G14) and output pins. It also details register differences and recommends selecting normal mode on RL78/G14 to match R8C/36M operation. Related manuals and technical updates are referenced for further information.
- Application NoteAI-generated Summary: The document explains the migration method from the R8C/36M group to the RL78/G14 family focusing on power control via CPU clock operation modes. It summarizes power control modes in R8C/36M, including standard operating, wait, and stop modes, and compares them with RL78/G14 CPU clock modes such as normal operation, HALT, STOP, and SNOOZE. Key differences include the clock source selection after reset and the inability of RL78/G14 to use the low-speed on-chip oscillator as the CPU clock. Detailed mode transition diagrams and user manual references are provided.
- Application NoteAI-generated Summary: The document explains how to migrate the reset function from the R8C/36M group to the RL78/G14 family. It compares the reset types of both families, showing that RL78/G14 supports more reset types. It details the correspondence between reset functions and highlights differences in reset behavior, such as clock settings and protection states after reset. The guide also specifies conditions for hardware reset via the RESET pin for both groups, emphasizing timing and voltage requirements.View More (140)
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- IDE and Coding ToolAdd new CPU types to the compiler package (for High-performance Embedded Workshop V4 or later)
- IDE and Coding ToolRenesas integrated development environment (IDE) (for SuperH, RX, R8C, M32R, M16C, H8SX, H8S, H8, and 740 families).
- Compiler/AssemblerC/C++ Compiler Package for R8C Family and M16C Family (R32C/M32C/M16C) , * Packed the following three compiler packages : [Content] C Compiler Package for R32C Series, C Compiler Package for M32C Series [M3T-NC308WA], and C/C++ Compiler Package for M16C Series and R8C Family [M3T-NC30WA]. They are bundled with the simulator debugger and High-performance Embedded Workshop.
- EmulatorA full-spec emulator available for full bus trace. This can be used for various devices by MCU units or connection parts exchange. [Compatible software(GUI): High-performance Embedded Workshop] [Target devices: RX610, R8C/5x, R8C/3x, M16C/64, RS-4 and others.]
- EmulatorOn-Chip Debugging Emulator for R8C, M16C, H8S, H8 and 740 families. E8a is also used as a device programmer for Renesas microcomputers. This product is E8 emulator's successor.
- EmulatorMCU unit for the R8C/3x Series [for E100]. An MCU-dependent converter board is required.
- Programmer (Unit/SW)On-chip debugging emulator available as a flash memory programmer [Available flash programming software: Flash Development Toolkit] [Support MCU/MPU and devices: SuperH RISC engine, R8C, M16C, H8SX, H8S, H8, 740]
- Programmer (Unit/SW)Flash memory programming software. [Support MCU/MPU and devices: SuperH RISC engine, RX, R8C, M16C, H8SX, H8S, H8, 740]
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- IDE and Coding ToolAdd new CPU types to the compiler package (for High-performance Embedded Workshop V4 or later)
- IDE and Coding ToolRenesas integrated development environment (IDE) (for SuperH, RX, R8C, M32R, M16C, H8SX, H8S, H8, and 740 families).
- Compiler/AssemblerC/C++ Compiler Package for R8C Family and M16C Family (R32C/M32C/M16C) , * Packed the following three compiler packages : [Content] C Compiler Package for R32C Series, C Compiler Package for M32C Series [M3T-NC308WA], and C/C++ Compiler Package for M16C Series and R8C Family [M3T-NC30WA]. They are bundled with the simulator debugger and High-performance Embedded Workshop.
- EmulatorA full-spec emulator available for full bus trace. This can be used for various devices by MCU units or connection parts exchange. [Compatible software(GUI): High-performance Embedded Workshop] [Target devices: RX610, R8C/5x, R8C/3x, M16C/64, RS-4 and others.]View More (22)
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Knowledge Base
-
(R8C) Are there any hardware precautions for accurate A/D conversion?
In order to perform A/D conversion, it is necessary to fully charge the internal capacitor, but if the impedance of the A/D conversion target is high, the discharge and charge will take time and the conversion value will not be accurate. For correct A/D ...
Jun 19, 2006 -
Can a parallel programmer verify the program in condition the ROM code protect is enabled?
The ROM code protect is enabled at the first MCU reset after setting the ROM code protect function. If there is no reset after writing the program, the program can be verified. Contact the parallel programmer manufacturer for programmer specifications.
Dec 26, 2017 -
What will happen if the MCU starts operating before oscillation is stabilized?
Serial interfaces and timers may not be able to operate correctly. If the CPU clock is switched from "division by 8" to "no divisions" before oscillation is stabilized, the program will not perform properly because the CPU cannot fetch the program codes correctly. Timers, A/D converter and serial ...
Dec 26, 2017
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