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Renesas Electronics Corporation

Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.

Features

  • 280 ps typical propagation delay
  • 100 ps max output-to-output skew
  • LVPECL operating range: VCC = 3.135 V to 3.8 V
  • 8-lead SOIC and 8-lead TSSOP packages
  • Ambient temperature range –40°C to +85°C
  • 8-lead SOIC Pb-free package available

Description

The MC100ES60T22 is a low skew dual LVTTL/LVCMOS to differential LVPECL translator. The low voltage PECL levels, small package, and dual gate design are ideal for clock translation applications.

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