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Renesas Electronics Corporation

Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.

Features

  • Two LVPECL/ECL output pairs
  • Frequency divide select options: ÷1 (pass through), ÷2, ÷4, ÷8, ÷16
  • IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML
  • Output frequency: 2GHz (maximum)
  • Output skew: 15ps (maximum)
  • Part-to-part skew: 250ps (maximum)
  • Additive phase jitter, RMS: 0.20ps (typical)
  • LVPECL supply voltage range: 2.375V to 3.63V
  • ECL supply voltage range: -3.63V to -2.375V
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Description

The 8S89874I is a high speed 1:2 Differential-to- LVPECL Buffer/ Divider. The 8S89874I has a selectable ÷1, ÷2, ÷4, ÷8, ÷16 output divider, which allows the device to be used as either a 1:2 fanout buffer or frequency divider. The clock input has internal termination resistors, allowing it to interface with several differential signal types while minimizing the number of required external components. The device is packaged in a small, 3mm x 3mm VFQFN package, making it ideal for use on space-constrained boards.

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