Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PGG20 |
| Lead Count (#): | 20 |
| Pkg. Dimensions (mm): | 6.5 x 4.4 x 1.0 |
| Pitch (mm): | 0.65 |
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 20 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 3000 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | 0 to 70°C |
| C-C Jitter Max P-P (ps) | 35 |
| Core Voltage (V) | 3.3 |
| Diff. Input Signaling | 3.3 |
| Divider Value | 2, 4, 5 |
| Feedback Divider | 5 - 5 |
| Feedback Input | No |
| Function | Jitter Attenuators and Frequency Translators |
| Input Freq (MHz) | 98 - 128 |
| Input Type | LVPECL, SSTL, LVDS, HCSL, HSTL |
| Inputs (#) | 1 |
| Length (mm) | 6.5 |
| MOQ | 3000 |
| Operating Freq | 320 |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 98 - 320 |
| Output Signaling | LVDS |
| Output Skew (ps) | 145 |
| Output Type | LVDS |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 3 |
| Package Area (mm²) | 28.6 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 6.5 x 4.4 x 1.0 |
| Pkg. Type | TSSOP |
| Product Category | FemtoClock, General Purpose Clocks |
| Prog. Clock | No |
| Reel Size (in) | 13 |
| Reference Output | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | No |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | Yes |
| Thickness (mm) | 1 |
| VCO Max Freq (MHz) | 640 |
| VCO Min Freq (MHz) | 490 |
| Width (mm) | 4.4 |
The 874003-02 is a high performance Differential-to- LVDS Jitter Attenuator designed for use in PCI Express systems. In some PCI Express systems, such as those found in desktop PCs, the PCI Express clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The 874003-02 has a bandwidth of 400kHz which is designed to provide good jitter attenuation. The 874003-02 uses IDT's 3RD Generation FemtoClock® PLL technology to achieve the lowest possible phase noise. The device is packaged in a 20 lead TSSOP package, making it ideal for use in space constrained applications such as PCI Express add-in cards.