Features
- Three differential LVDS output pairs
- Three differential LVPECL clock input pairs
- PCLKx pair can accept the following differential input levels: LVPECL, LVDS
- Maximum output frequency: 2.5GHz
- Additive phase jitter, RMS: 0.053ps (typical)
- Propagation delay: 480ps (maximum), QA/nQA 445ps (maximum), QBx/nQBx
- Part-to-part skew: 200ps (maximum)
- Full 2.5V supply mode
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
854S54I - Block Diagram
Description
The 854S54I is a dual 2:1 and 1:2 Multiplexer. The 2:1 Multiplexer allows one of 2 inputs to be selected onto one output pin and the 1:2 MUX switches one input to one of two outputs. This device is useful for multiplexing multi-rate Ethernet PHYs which have 100M bit and 1000M bit transmit/receive pairs onto an optical SFP module which has a single transmit/receive pair. See Application Section for further information. The 854S54I is optimized for applications requiring very high performance and has a maximum operating frequency of 2.5GHz. The device is packaged in a small, 3mm x 3mm VFQFN package, making it ideal for use on space-constrained boards.
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