Features
- Eight differential 3.3V LVPECL/ECL outputs
- Two selectable differential input pairs
- PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL
- Maximum output frequency: 2GHz
- Translates any single-ended input signal to 3.3V LVPECL levels with resistor bias on nPCLKx input
- Output skew: 20ps (typical)
- Propagation delay: 825ps (typical)
- Additive phase jitter, RMS: 0.14ps (typical)
- LVPECL mode operating voltage supply range: VCC = 3.0V to 3.8V, VEE = 0V
- ECL mode operating voltage supply range: VCC = 0V, VEE = -3.0V to -3.8V
- -40°C to 85°C ambient operating temperature
- Available lead-free (RoHS 6) package
853S310I - Block Diagram
Description
The 853S310I is a low skew, high performance 1-to-8 Differential-to-3.3V LVPECL/ECL Fanout Buffer. The PCLKx, nPCLKx pairs can accept LVPECL, LVDS, CML and SSTL differential input levels. The 853S310I is characterized to operate from a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 853S310I ideal for those clock distribution applications demanding well defined performance and repeatability.
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Qty. per Reel (#) | Qty. per Carrier (#) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 853S310CVILF | Obsolete | N/A | In Stock | PLCC | 28# | Tube | 3 | 0 | 38# | Yes | e3 Sn | -40 to 85°C |
| 853S310CVILFT | Obsolete | N/A | Out of Stock | PLCC | 28# | Reel | 3 | 500# | 0 | Yes | e3 Sn | -40 to 85°C |
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- End Of Life NoticePDF 160 KB Jul 06, 2021
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- Application NotePDF 120 KB 7WDXRDKU4E7E-5-57289 May 06, 2014
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- Application NotePDF 180 KB 7WDXRDKU4E7E-5-57283 May 06, 2014
- Product BriefPDF 378 KB 7WDXRDKU4E7E-6-1169 Aug 14, 2012
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- Application NotePDF 1.99 MB 7WDXRDKU4E7E-5-57242 Mar 01, 2022
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- Product BriefPDF 378 KB 7WDXRDKU4E7E-6-1169 Aug 14, 2012
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