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Renesas Electronics Corporation

Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.

Features

  • Two differential LVHSTL compatible outputs
  • One differential CLK, nCLK input pair
  • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
  • Maximum output frequency: 700MHz
  • Translates any single-ended input signal to LVHSTL levels with resistor bias on nCLK input
  • Output skew: 30ps (maximum)
  • Part-to-part skew: 250ps (maximum)
  • Propagation delay: 1ns (maximum)
  • Output duty cycle: 49% - 51% up to 266.6MHz
  • VOH = 1.2V (maximum)
  • 3.3V operating supply
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free RoHS compliant package

Description

The 85211I is a low skew, high performance 1-to-2 Differential-to-LVHSTL Fanout Buffer. The CLK, nCLK pair can accept most standard differential input levels. The 85211I is characterized to operate from a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 85211I ideal for those clock distribution applications demanding well-defined performance and repeatability. For optimal performance, terminate all outputs.

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