Features
- Three 3.3V LVPECL outputs on two banks, A Bank with one LVPECL pair and B Bank with 2 LVPECL output pairs
- Using a 31.25MHz or 26.041666 crystal, the two output banks can be independently set for 625MHz, 312.5MHz, 156.25MHz or 125MHz
- Selectable crystal oscillator interface or LVCMOS/LVTTL single-ended input
- VCO range: 560MHz – 700MHz
- RMS phase jitter @ 156.25MHz (1.875MHz - 20MHz): 0.51ps (typical)
Offset Noise Power
100Hz ................ -96.8 dBc/Hz
1kHz .................. -119.1 dBc/Hz
10kHz ................ -126.4 dBc/Hz 1
00kHz .............. ..-127.0 dBc/Hz - Full 3.3V supply mode
- 0°C to 70°C ambient operating temperature
- Industrial temperature available upon request
- Available in lead-free (RoHS 6) package
Description
The 843003 is a 3 differential output LVPECL synthesizer designed to generate Ethernet reference clock frequencies. Using a 31.25MHz or 26.041666MHz, 18pF parallel resonant crystal, the following frequencies can be generated based on the settings of 4 frequency select pins (DIV_SEL[A1:A0], DIV_SEL[B1:B0]): 625MHz, 312.5MHz, 156.25MHz, and 125MHz. The 843003 has 2 output banks, Bank A with 1 differential LVPECL output pair and Bank B with 2 differential LVPECL output pairs.
The two banks have their own dedicated frequency select pins and can be independently set for the frequencies mentioned above. The 843003 uses our 3rd generation low phase noise VCO technology and can achieve 1ps or lower typical rms phase jitter, easily meeting Ethernet jitter requirements. The 843003 is packaged in a small 24-pin TSSOP package.
Support Communities
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I want to find a replacement for 844021BG-01LF, input 25MHz clock, output 125MHz LVDS clock
I want to find a replacement for 844021BG-01LF, input 25MHz clock, output 125MHz LVDS clock
Mar 9, 2022
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