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Features

  • Optimized for 2.5V LVTTL
  • Guaranteed Low Skew < 25ps (max)
  • Very low duty cycle distortion < 300 (max)
  • High speed propagation delay < 1.8ns. (max)
  • Up to 200MHz operation
  • Very low CMOS power levels
  • Hot insertable and over-voltage tolerant inputs
  • 1:5 fanout buffer
  • 2.5V VDD
  • Available in TSSOP package

Description

The 5T9050 2.5V single data rate (SDR) clock buffer is a single-ended input to five single-ended outputs buffer built on advanced metal CMOS technology. The SDR clock buffer fanout from a single input to five single-ended outputs reduces the loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise.

Part NumberStatusSamplesStockPackageLead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Qty. per Reel (#)Qty. per Carrier (#)Pb (Lead) FreePb Free CategoryTemp. Range (°C)
5T9050PGGIObsoleteN/AIn StockTSSOP28#Tube1050#Yese3 Sn-40 to 85°C
5T9050PGGI8ObsoleteN/AIn StockTSSOP28#Reel12000#0Yese3 Sn-40 to 85°C
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