Features
- Low additive phase jitter RMS: 50fs
- Extremely low skew outputs (50ps)
- Low-cost clock buffer
- Packaged in an 8-pin SOIC and 8-pin DFN, Pb-free
- Input/Output clock frequency up to 200MHz
- Non-inverting output clock
- Ideal for networking clocks
- Operating voltages: 1.8V to 3.3V
- Output Enable mode tri-state outputs
- Advanced, low-power CMOS process
- Extended temperature range: -40 °C to +105 °C
Description
The 551S is a low cost, high-speed single input to four output LVCMOS clock buffer that offers a best-in-class additive phase jitter of sub 50fs.
Parameters
| Attributes | Value |
|---|---|
| Temp. Range (°C) | -40 to 85°C |
Applied Filters:
Loading
Filters
Software & Tools
Sample Code
Simulation Models
This video overviews the LVCMOS Fanout Buffers, showcasing their best-in-class performance with extremely low phase jitter, minimal output skew, and low power consumption, along with other competitive features.
News & Blog Posts
News Mar 24, 2015 |