Features
- Packaged as 8-pin SOIC (Pb-free) or die
- IDT's lowest cost PLL clock
- Generates 16.9344 MHz for stereo codecs from the 14.31818 MHz motherboard clock.
- Can be cost effective in replacing a single surface-mount crystal
- Can be driven by other 5xx series
- Input crystal frequency of 5 - 27 MHz
- Input clock frequency of 2 - 50 MHz
- Output clock frequencies up to 160 MHz
- Low jitter - 50 ps one sigma
- Duty cycle of 45/55 up to 160 MHz
- Operating voltages of 3.0 to 5.5V
- 25 mA drive capability at TTL levels
- Advanced, low power CMOS process
Description
Support Communities
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ZMOD4510 Stopping measurements
Hi, what is the correct way to stop the ZMOD4510 measurements and then restart? It is necessary to init the sensor and the library again in order to reset the data structures? Thanks
Sep 12, 2024 -
I need E2 lite pinout diagram
Hi, I need the pinout diagram for the E2-Lite debugger. I need to connect it to my controller. I have attached screenshots. Regards, Ashok
Sep 10, 2024 -
ISL71831SEH input over voltage protection
The ISL71831 has input over voltage protection. Does this include overvoltage in both directions? I.e.: protection above V+ and protection below GND?
Sep 6, 2024
Knowledge Base
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Notes on iodefine RPDL.h when SCMR for RX62T is used in PDG2
... BCP2 bit in the SCMR register does not exist. To use BCP2, you need to change the iodefine_RPDL.h file. Before modification, around line 5031 in iodefine_RPDL.hunion { unsigned char BYTE; struct { unsigned char :4; unsigned char SDIR:1; unsigned char SINV:1; unsigned char :1; unsigned char ...
Jun 14, 2017
Support Communities
