Description
The 4559 Group is supported only for customers who have already adopted these products.
| Part Number | Status | Samples | Stock | RoHS | Package | Bit Size | RAM (KB) | Lead Count (#) | Operating Freq (Max) (MHz) | CPU | DMA | Timer | Ethernet | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| M34559G6-XXXFP#V0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LQFP | 4 | 0.28KB | 52# | 6MHz | 4500 | No | 8-bit x 2-ch, 16-bit x 1-ch | No | -20 to +85 |
| M34559G6-XXXFP#X4 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LQFP | 4 | 0.28KB | 52# | 6MHz | 4500 | No | 8-bit x 2-ch, 16-bit x 1-ch | No | -20 to +85 |
| M34559G6FP#V0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LQFP | 4 | 0.28KB | 52# | 6MHz | 4500 | No | 8-bit x 2-ch, 16-bit x 1-ch | No | -20 to +85 |
| M34559G6FP#X4 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LQFP | 4 | 0.28KB | 52# | 6MHz | 4500 | No | 8-bit x 2-ch, 16-bit x 1-ch | No | -20 to +85 |
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- Product Change Notice
- Product Change Notice
- Product Change Notice
- Application NotePDF 219 KB REC05B0047-0200 Rev.2.00 Aug 29, 2008AI-generated Summary: The document details the differences between the 455A and 4559 Groups, focusing on performance, pin configuration, and control registers. Key distinctions include instruction count, ROM and RAM sizes, input/output port functions, timer configurations, LCD control circuits, oscillator frequencies, and interrupt control registers. Both groups share similar pin layouts and some timer and clock features, but differ in memory capacity, port functionalities, and interrupt handling.
- Application NoteAI-generated Summary: The document details the differences between the 4553 and 4559 groups in terms of performance, pin configuration, and control registers. It compares instruction sets, memory types and sizes, I/O port functions, timers, LCD control circuits, and interrupt systems. Pin layouts for both groups are illustrated, highlighting variations in segment and common pins. Control registers for interrupts and clock management are also contrasted, showing differences in functionality and bit usage.
- Application NoteAI-generated Summary: The document explains how to set the carrier output for the 4559 group of microcomputers, detailing the configuration of related registers such as Interrupt Control Registers V1 and I1, and Timer Control Registers W1 and W2. It describes bit settings for enabling/disabling interrupts, input controls, timer start/stop, count sources, and PWM signal functions. The document also notes that some bits are unused and should be set according to system requirements.Related Files:
- Application NoteAI-generated Summary: The document explains how to set the power-down function for the 4559 group microcomputers, detailing the configuration of related control registers such as Interrupt Control Registers V2 and I1, and LCD Control Registers L1 and L2. It describes bit settings for enabling or disabling interrupts, controlling LCD power supply, duty cycle, bias, and pin functions. The document also notes the use of specific instructions to write or transfer register values and highlights unused bits during power-down settings.Related Files:
- Application NoteAI-generated Summary: The document explains how to configure the LCD display function for the 4559 microcomputer group, including example applications. It details the oscillator frequency setup and system clock usage. The document describes the bit configurations and usage instructions for LCD control registers L1, L2, L3, and C1, specifying how to write values using specific instructions and the function of each bit related to LCD operation, power supply, and pin functions.Related Files:
- Application NoteAI-generated Summary: The document explains how to configure timers in the 4559 group microcomputers, including examples of timer operations such as buzzer output, event counting, external input start, fixed-cycle counting, and watchdog timer use. It details the bit configurations of related interrupt control registers (V1, V2, I1) and the timer control register PA, describing how to enable or disable interrupts and control timer start/stop functions.Related Files:
- Application NoteAI-generated Summary: The document explains how to configure interrupts for the 4559 group microcomputers, detailing the use of external and timer interrupts (Timer 1, 2, and 3). It describes the bit configurations of various interrupt control registers (V1, V2, I1) and the timer control register PA, including how to enable or disable interrupts and control input and timer start/stop functions. The document also notes that some bits are unused and should be set according to system requirements.Related Files:
- Application NotePDF 190 KB REJ05B1031-0100 Rev.1.00 Apr 06, 2007AI-generated Summary: The document explains how to configure input/output ports PO, P1, P2, and P3 of the 4559 microcomputer group. Each port supports 4-bit data input/output and shares pins with LCD segment outputs. Users can select pin functions via control registers, enable key-on wakeup and pullup transistor functions, and choose output modes between N-channel open-drain and CMOS. Input and output methods involve setting specific registers and using instructions to transfer data between ports and registers.
- Technical Update
- Guide
Recommended Documents (1)
Datasheets (1)
- Guide
Manuals & Guides (1)
- Application NotePDF 219 KB REC05B0047-0200 Rev.2.00 Aug 29, 2008AI-generated Summary: The document details the differences between the 455A and 4559 Groups, focusing on performance, pin configuration, and control registers. Key distinctions include instruction count, ROM and RAM sizes, input/output port functions, timer configurations, LCD control circuits, oscillator frequencies, and interrupt control registers. Both groups share similar pin layouts and some timer and clock features, but differ in memory capacity, port functionalities, and interrupt handling.
- Application NoteAI-generated Summary: The document details the differences between the 4553 and 4559 groups in terms of performance, pin configuration, and control registers. It compares instruction sets, memory types and sizes, I/O port functions, timers, LCD control circuits, and interrupt systems. Pin layouts for both groups are illustrated, highlighting variations in segment and common pins. Control registers for interrupts and clock management are also contrasted, showing differences in functionality and bit usage.
- Application NoteAI-generated Summary: The document explains how to set the carrier output for the 4559 group of microcomputers, detailing the configuration of related registers such as Interrupt Control Registers V1 and I1, and Timer Control Registers W1 and W2. It describes bit settings for enabling/disabling interrupts, input controls, timer start/stop, count sources, and PWM signal functions. The document also notes that some bits are unused and should be set according to system requirements.Related Files:
- Application NoteAI-generated Summary: The document explains how to set the power-down function for the 4559 group microcomputers, detailing the configuration of related control registers such as Interrupt Control Registers V2 and I1, and LCD Control Registers L1 and L2. It describes bit settings for enabling or disabling interrupts, controlling LCD power supply, duty cycle, bias, and pin functions. The document also notes the use of specific instructions to write or transfer register values and highlights unused bits during power-down settings.Related Files:
- Application NoteAI-generated Summary: The document explains how to configure the LCD display function for the 4559 microcomputer group, including example applications. It details the oscillator frequency setup and system clock usage. The document describes the bit configurations and usage instructions for LCD control registers L1, L2, L3, and C1, specifying how to write values using specific instructions and the function of each bit related to LCD operation, power supply, and pin functions.Related Files:View More (8)
Application Notes & White Papers (8)
- Product Change Notice
- Product Change Notice
- Product Change Notice
Product Notices (PCN, EOL, etc) (3)
- Technical Update
- Technical UpdatePDF 32 KB TN-4500-01-9501 Jan 01, 1995
Errata & Technical Updates (3)
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- Compiler/AssemblerAbsolute Assembler for 4500 Series, * Emulator debugger included.
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- Compiler/AssemblerAbsolute Assembler for 4500 Series, * Emulator debugger included.
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Support Communities
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[RCarH3][DRM] In linux guest mode, rogue_km crash.
... 0x2b0 [pvrsrvkm][ 39.438770] LR is at PVRSRVDebugRequest+0x194/0x2b0 [pvrsrvkm][ 39.444463] pc : [
Jul 17, 2021] lr : [ ] pstate: 00000145[ 39.452856] sp : ffff0000097839a0[ 39.455962] x29: ffff0000097839a0 x28: 0000000000000000[ 39.461846] x27: ffff8005f5f9de20 x26: 0000000000000002[ 39.467789] x25: ffff8005f36bc700 x24: 0000000000000009[ 39.471167] x23: 0000000000000000 x22: 0000000000000000[ 39.476870 ... -
Device tree RZ/G2L for SN65DSI83 and backlight
Hello everyone, we are using a SN64DSI83 as an interface bridge between the MIPI DSI of the RZ/G2L and a LVDS screen. I have posted the device tree file below. However the screen is instantly turned off after uboot exists and we have no idea why. The configuration ...
Mar 15, 2023 -
Document R11AN0073EU0110 has a link to a hex editor
Document R11AN0073EU0110 has a link to a hex editor http://www.hexedit.com/ recommended to examine BCH files. This link is stale. The python script for generating BCH files recommends using the command line switch --formatting to document the BCH file layout. This command switch throws an ...
Jun 18, 2019
Knowledge Base
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Can 4559 Group MCUs programs be assembled using debugger M3T-PD45?
Programs can be assembled but not debugged with M3T-PD45.You will need to use compact emulator M34559T2-CPE or the emulator debugger bundled with M3T-PD45M to debug 4559 Group MCUs.
Sep 11, 2006 -
When does count time operation starts using Prescaler and timer 1?
Count starts from the first rising edge of the count source (2) after prescaler and timer 1 operations start (1). Subject to the operation start timing of the timers and count source, after count starts, the time to the first underflow (3) will be (up to one count period) shorter ...
Jan 17, 2005
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