Overview
Description
This is the evaluation kit for the RC32504A and RC22504A point-of-use jitter attenuator and clock generators. The board comes populated with an RC32504A device. The RC22504A is functionally a subset of the RC32504A, so this board can be used to evaluate either, or both, of the devices. Refer to the device pages for additional details on the products.
Features
- Jitter below 100fs RMS (10kHz to 20MHz)
- Compliant with ITU-T G.8262 for synchronous Ethernet/OTN (EEC/OEC) and ITU-T G.8262.1 for enhanced synchronous Ethernet/OTN (eEEC/eOEC)
- PLL core consists of fractional-feedback Analog PLL (APLL) which can optionally be steered by a Digital PLL (DPLL)
- Operates from a 25MHz to 80MHz crystal or XO
- APLL frequency independent of input/crystal frequency
- Operates as a frequency synthesizer, jitter attenuator, synchronous equipment slave clock or Digitally Controlled Oscillator (DCO)
- DPLL loop filter programmable from 0.1Hz to 12kHz
- DCO has tuning granularity of < 1ppb
- Programmable input buffer supports HCSL, LVDS, or two LVCMOS with no external terminations needed
- Input frequencies: 1MHz to 800MHz (250MHz for LVCMOS)
- Reference monitor qualifies/disqualifies input clock
- Programmable status output
- 4 differential/8 LVCMOS outputs
- Any frequency from 10MHz to 1GHz (180MHz for LVCMOS)
- Programmable output buffer supports HCSL (DC-coupled), LVDS/LVPECL/CML (AC-coupled) or two LVCMOS
- Differential output swing is selectable: 400mV to 800mV
- Output clock phase individually adjustable in 100ps steps
- Output Enable input with programmable effect
- Supports up to 1MHz I2C or up to 20MHz SPI serial processor port
- Can configure itself automatically after reset through internal customer-definable One-Time Programmable (OTP) memory with up to four different configurations
Applications
Documentation
Featured Documentation
Log in required to subscribe
|
|
|
|
|---|---|---|
| Type | Title | Date |
| Manual - Development Tools | PDF 1.28 MB | |
| Application Note |
PDF
377 KB
AI-generated Summary:
The FemtoClock 2 clock generator configures synchronous Ethernet (SyncE) clocks with jitter attenuation to meet ITU-T G.8262 requirements. It supports two SyncE options for 2048Kbps and 1544Kbps hierarchies and an enhanced SyncE option (G.8262.1). Configuration uses Renesas IC Toolbox (RICBox) software, enabling easy selection of SyncE profiles and jitter attenuator settings. The recommended device, RC32504A, requires a stable frequency reference like a TCXO instead of a quartz crystal. The document details software setup, configuration steps, and compliance testing for SyncE applications.
|
|
| Manual - Software | PDF 1.22 MB | |
| Guide | PDF 80 KB | |
4 items
|
||
Design & Development
Software & Tools
Software & Tools
| Software title
|
Software type
|
Company
|
|---|---|---|
| Renesas IC Toolbox (RICBox) The Renesas IC Toolbox (RICBox) software platform enables customers to configure Renesas devices on evaluation kits when attached to the computer running the software.
|
Software Package | Renesas |
1 item
|
||
Product Options
| Part Number | Status | Stock | Budgetary Price (USD) | Sampleable |
|---|---|---|---|---|
| RC32504A-EVKGNA#0 | Active | In Stock | 1u | $600 | Available |
Videos & Training
Demonstration of Renesas’ Lab on the Cloud virtual environment for FemtoClock®2 ultra-low phase noise synthesizer and jitter attenuator.
Support
Support Communities
- RC32504A
How to program the user configuration file in OTP of RC32504A? What hard ware connection I have to make and which software I should you?
Jan 9, 2025
Support Communities
Get quick technical support online from Renesas Engineering Community technical staff.
Knowledge Base
Browse our knowledge base for helpful articles, FAQs, and other useful resources.
